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Technical Documents
Intel® IOP310 I/O Processor Chipset
Technical documents
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Application notes
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Intel® IQ80310 Development Tools
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Using the Intel® IQ80310 Ethernet Connection Under RedBoot
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Performance Profiling Techniques on Intel XScale® Microarchitecture Processors
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High Performance Memory Controller for the Intel® 80200 Processor using an external FPGA
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Using the Intel® 80200 Verilog Bus Functional Model (BFM)
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External Interrupt Controller Using Intel® 80310 I/O Processor Chipset
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Timer Implementation Using Intel® 80310 I/O Processor Chipset
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Migrating from Intel® SA-110 to Intel® 80200 Processor based on Intel XScale® Microarchitecture
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Intel® 80310 I/O Processor Chipset with Intel XScale® Microarchitecture Initialization: Programming Guide and Initialization
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Hot-Debug for Intel XScale® Core Debug
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Recommended JTAG Circuitry for Debug with Intel XScale® Microarchitecture
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Coding Tips for Developers Targeting I/O Processors Based on the Intel XScale® Microarchitecture
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Running RAM RedBoot to Move Flash from Outbound Direct Addressing Window
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Initializing Intel® 80312 I/O Companion Chip Secondary PCI Bus Private Devices
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Intel® IQ80310 Evaluation Platform Board: Using JTAG to Program Flash Memory
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Datasheets
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Intel® 80200 Processor based on Intel XScale® Microarchitecture
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Intel® 80312 I/O Companion Chip
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Design guides
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Intel® 80310 I/O Processor Chipset with Intel XScale® Microarchitecture
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Intel® 80310 I/O Processor Chipset Design Review Checklist
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Manuals
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Messaging Unit (MU) Library and Testbench for Intel® 80310 I/O Processor Chipset Programmer's Reference Manual
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AAU Support Library for the Intel® 80310 I/O Processor Chipset and 80321 I/O Processor Reference Manual
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Intel® 80310 I/O Processor Chipset DMA Support Library Programmer's Reference Manual
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Intel XScale® Microarchitecture Programmer's Reference Manual
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Intel® 80200 Processor Evaluation Platform Board Manual (80200EVB)
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Intel® 80200 Processor based on Intel XScale® Microarchitecture Developer's Manual
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Board Back Plane - 80300BP Manual
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Intel® 80312 I/O Companion Chip Developer's Manual
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Papers
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Intel® 80310 I/O Processor Chipset with Intel XScale® Microarchitecture Initialization Considerations
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SCKE Circuit Description for the Intel® 80303 I/O Processor and Intel® 80312 Companion Chip
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Intel® 80310 I/O Processor Chipset AAU Coding Techniques
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Intel® 80310 I/O Processor Chipset MU Coding Techniques
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Product briefs
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Intel® 80200 Processor Product Brief
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Intel® IOP310 I/O Processor Chipset Product Brief
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Schematics
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80200 Allegro layout symbol
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80200 OrCAD* library symbol
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Intel® 80200 Processor Evaluation Platform Board (80200EVB)
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Board Back Plane - 80300BP Schematics
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Simulation model
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Intel® 80200 3.3 volt Simulation Model
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Intel® 80312 3.3 volt Simulation Model
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Specification updates
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Intel® 80200 I/O Processor based on Intel XScale® Microarchitecture
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Intel® 80312 I/O Companion Chip
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Technical notes
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ECC Handling Issues on Intel XScale® I/O Processors Technical Note
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