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Products
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Intel® 80314 Companion Chip |
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Integrated PCI-X Bridge, Memory and Ethernet MACs Deliver Enhanced Performance
Block Diagram |
Features and Benefits |
Processor Comparison |
Highlights
The Intel 80314 introduces a powerful combination of technical advancements. The 64-bit true switch fabric network (SFN) allows multiple concurrent transactions. The SFN offers scalable frequency, 4-deep transaction queues (256 B or 1 KB) with burst sizes up to 1kB supported. Store and forward to the SFN and immediate drain from the SFN are supported. The integrated bridge (PCI/PCI-X) can configure devices on either bus, with each side capable of operating at different frequencies, 33 MHz to 133 MHz, and in either mode, PCI or PCI-X. The 80314 has 4 address spaces with translation man- aged via highly configurable sets of registers. It contains a 32-bit peripheral bus interface (PBI) (programmable up to 133 MHz) that is great for embedded applications requiring a connection to non-PCI peripheral components such as ASICs, flash memory, PLDs, or DSPs.
The dual-ported SDRAM memory controller unit (MCU) is vastly improved over previous IOP generations with core-to-memory performance greater than 5 times faster! The interface runs at 200 MHz. It offers two-port (64-bit data, 36-bit address) concurrent access to memory with programmable arbitration for each port. It has support for up to 4 physical (8 logical) banks and has up to 32-page interleaving. The MCU has optional ECC and supports up to 12 GB (3 DIMMs) DDR SDRAM.
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The 80314 integrates a 4-channel DMA controller with support for unaligned transfers using both scatter-gather and direct modes. Data can be transferred to or from any SFN port. The DMA engines also support offloading of RAID5 XOR and iSCSI CRC32C operations.The 80314 features (2) 10/100/1000 Mbps Ethernet MACs that fully support standards IEEE 802.3, 802.3u, 802.3x, 802.3z, and 802.3ac. Both full- and half-duplex modes are supported at 10/100 Mbps. Full duplex is supported at 1 Gbps.
The 80314 features an option of integrated 1 MB very low-latency SRAM that has either direct core or SFN access. The SRAM BAR has priority for 80200 Bus Interface unit address claiming. The SRAM is application-independent, so it can be used for a variety of applications.
The 80314 also integrates a Multi-Processor Interrupt Controller (MPIC) with 24 interrupt inputs (16 external, 8 internal), 4 dedicated outputs, 16 priorities, 4 global 32-bit timers, 4 doorbell registers, and 4 general-purpose mailbox registers. Additional interfaces include I2C, 2 UART ports, and a JTAG interface. This integration helps reduce chip count, saves board space and simplifies designs.
High-performance Companion Chip for the Intel® 80200 Processor
The Intel® 80314 companion chip for the Intel® 80200 processor - the two-chip solution is the Intel® IOP315 - provides a rich peripheral set designed for storage and network applications. The Intel 80314 can support either one or two Intel 80200 processors. The Intel 80314 uses an internal switch fabric and supports concurrent transactions from any interface to any other interface. For fast memory transactions, the Intel 80200 processor interface has a dedicated bus to the DDR SDRAM memory controller that allows multiple concurrent outstanding transactions.
The Intel 80314 is especially well suited for high-performance storage applications such as network storage target devices (SAN, iSCSI, NAS) and intelligent network adapter cards (iSCSI, IPv4, IPv6, IPSec). The integrated PCI-X bridge, dual-ported ECC memory, low-latency 1 MB SRAM, high-bandwidth switch fabric and CRC32C and XOR engines make it an ideal choice for these applications. In addition, the Intel 80314 is an excellent solution for embedded and networking applications with its integrated dual-10/100/1000 Mbps MACs and flexible endian support.
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Product information
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Features and benefits
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| Features |
Benefits |
Intel® 80200 Interface
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100 MHz Request Bus |
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4-Entry Request Buffer |
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2.5V I/O generation, 3.3V tolerant (from Intel 80200) |
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Support for single or dual Intel 80200 processors |
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ECC-based bus integrity protection |
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High-performance Intel XScale® technology that scales |
Dual PCI/PCI-X Interfaces
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Integrated PCI-X bridge |
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25-133 MHz operation |
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4 DMA units with chaining support |
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Support to configure the device from remote PCI host |
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CPCI hot-sway support |
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4 concurrent split transactions |
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Configurable arbitration logic |
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PCI-X to PCI-X bridge integration lowers Bill of Material (BOM) cost and helps reduce board space
Provides for increased system concurrency |
Optimized Memory Controller
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Dual-ported MCU |
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64- and 72-bit memory |
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12 GB support, 3 DIMMs |
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Dramatically increases core to memory performance |
| Optional 1 MB of Low-Latency SRAM |
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Low-latency memory option helps reduce bottlenecks and improve performance |
Communications
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2 GbE MACs |
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133 MHz, 32-bit local bus with 4-chip selects |
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I2C |
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UARTs |
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8 GPIO pins |
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Integration reduces board space, lowers BOM, and improves performance |
Application Accelerator Units in DMA
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RAID5 XOR |
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iSCSI CRC32C |
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Storage-specific integration in hardware improves performance and helps reduce CPU overhead |
Intel® I/O processor comparison
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Intel® IOP315
I/O Processor Chipset |
Intel® IOP310
I/O Processor Chipset |
Intel® IOP321
I/O Processor Chipset |
Intel® IOP331
I/O Processor Chipset |
| Intel XScale® Core |
External can support one or two Intel® 80200s |
External can support one Intel® 80200 |
Integrated |
Integrated |
| Core Speed |
400 MHz, 600 MHz, 733 MHz |
400 MHz, 600 MHz, 733 MHz |
400 MHz, 600 MHz |
500 MHz, 667 MHz, 800 MHz |
| Chip Count |
2-Chip Solution
(Intel 80200 & Intel® 80314) |
2-Chip Solution
(Intel 80200 & Intel® 80312) |
1-Chip Solution
(w/o Bridge) |
1-Chip Solution
(w/ Bridge) |
| Package Size |
40 mm x 40 mm and 23 mm x 23 mm |
42.5 mm x 42.5 mm and 23 mm x 23 mm |
35 mm x 35 mm |
37.5 mm x 37.5 mm |
| Integrated Bridge |
133 MHz, 64-bit PCI-X Bridge |
66 MHz, 64-bit PCI - PCI Bridge |
133 MHz, 64-bit PCI-X Interface |
133 MHz, 64-bit PCI-X Bridge |
| Memory Controller |
Dual-ported 200 MHz DDR |
100 MHz SDRAM |
200 MHz (1.6 GB/s) Bus |
Dual-ported DDR 333 MHz/DDRII 400 MHz |
| Max Memory |
12 GB |
512 MB |
1 GB |
2 GB (DDR); 1 GB (DDR II) |
| Internal Bus Frequency |
133 MHz Switching Fabric |
100 MHz (800 MB/s) Bus |
200 MHz Bus |
266 MHz (2.1 GB/s) Bus |
| Integrated Memory |
1 MB low-latency SRAM |
None |
None |
None |
| Local Bus Width |
32 Bits (up to 133 MHz) |
8 Bits (asynchronous bus) |
32 Bits (up to 100 MHz) |
8/16 Bits (up to 66 MHz) |
| DMA Buffer Size |
4 x 256 Bytes |
256 Bytes |
1024 Bytes |
1024 Bytes |
| ATU Buffer Size |
4 x 1024 Bytes |
512 Bytes |
4096 Bytes |
4096 Bytes |
| Application Accelerator w/ XOR capability |
Yes |
Yes |
Yes |
Yes |
| I2C Bus Interface Unit |
2 Serial Units |
1 Serial Unit |
2 Serial Units |
2 Serial Units |
| Hardware-based CRC32C off-load |
Yes |
No |
No |
Yes |
| Integrated Ethernet MAC |
(2) 10/100/1000 Mbps |
None |
None |
None |
| Timers |
4 - 32-bit |
None |
2 - 32-bit |
2 - 32-bit |
| UART |
2 - 9-Pin (16550) |
No |
SPI |
2 - 4-Pin (16550) |
| GPIO |
8 Pins |
8 Pins |
8 Pins |
8 Pins |
| External Interrupt Pins |
16 |
4 |
5 |
17 |
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Product highlights
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Intel XScale® core support (one or two 80200 processors) |
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ECC-protected, dual-ported 200 MHz memory controller with support for 3 DIMMs (up to 12 GB), 4 physical (8 logical) banks, 32-page interleaving |
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(2) 64-bit-capable PCI/PCI-X interfaces with bridging, arbitration and cPCI hot-swap support |
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Switch fabric network (SFN) architecture allowing concurrent DMA, CPU, PCI-X, Gigabit Ethernet and Local Bus accesses |
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(2) Gigabit Ethernet MACs, half-/full-duplex support at 10/100 Mb and full-duplex 1 Gb; GMII management interface |
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1 MB low-latency parity-protected on-chip SRAM with direct core or SFN access |
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Central 4-channel DMA engine with iSCSI CRC32C and RAID5 XOR (up to 16 sources) off-load engines |
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Flexible endian support |
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32-bit, up to 133 MHz Peripheral Bus Interface (PBI) with 4-chip selects |
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Multi-processor vectoring Interrupt Controller |
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(2) 16550-compatible UARTs with full 9-wire interfaces |
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(8) GPIO pins |
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(2) industry-standards-based I2C interfaces |
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1025 HSBGA (40 mm x 40 mm) |
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