Intel(R) i960(R) Processor Documentation

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	Embedded & Flash Memory i960® Processors 80960MC Hardware Designer's Reference Manual


	80960MC Hardware Designer's Reference Manual Title Page
	Chapter 1 - Introduction to the 80960MC Microprocessor
	Chapter 2 - 80960MC System Architecture
	Chapter 3 - The 80960MC Processor and the Local Bus
	Chapter 4 - Memory Interface
	Chapter 5 - I/O Interface
	Chapter 6 - 80960MC Multiprocessor System Architecture
	Chapter 7 - Advanced Processor Bus
	Chapter 8 - AP-Bus Interface Using the BXU
	Chapter 9 - Memory and I/O Interface Using the BXU
	Chapter 10 - Fundamental Concepts of Fault Handling
	Chapter 11 - Confinement Areas / Detection Mechanisms
	Chapter 12 - Error Reporting
	Chapter 13 - Recovery
	Chapter 14 - Initialization
	Chapter 15 - Fault-Tolerant I/O Considerations
	Appendix A - BXU Registers and Commands
	Index