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The 82389 is a highly integrated VLSI device that maximizes the performance of a Multibus II based microprocessor system. The functions of bus arbitration, data transmit packetizing, error handling and interrupt control are integrated. Therefore, the host CPU can be offloaded to utilize the maximum bus performance and thus increase the system throughput. The 82389 can interface with an 8-, 16-, or 32-bit processor. The internal device bus or parallel system bus (PSB) is not affected by the host CPU bandwidth. Data on the internal bus can be burst-transferred at maximum bus speed of 40M/s regardless of the host CPU bus performance. |
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| PRODUCT |
SPEED |
RAM |
ROM |
VOLTAGE |
TEMP RANGE |
PACKAGE |
| 82389 |
Max burst
speed of
40Mbyte/s |
N/A |
N/A |
5V |
0 to 70C |
149-pin
CPGA |
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CPGA = Ceramic Pin Grid Array
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