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Products
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| Intel® E7520 Chipset |
| For Intel® Core™2 Duo Processors and Intel® Core™ Duo Processors for Embedded Computing |
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| The Intel® E7520 chipset for embedded computing - utilizing dual-processor, high-bandwidth chipset technology - enables reduced power consumption with improved platform reliability and system manageability compared to previous-generation Intel® chipsets. The 667 MHz front-side bus supports Intel® Core™2 Duo processors (T7400Δ and L7400Δ) and Intel® Core™ Duo processors (T2500Δ and L2400Δ), providing high bandwidth for increased memory and I/O throughput, specifically optimized to offer a value-sensitive solution for embedded and communications applications. |
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| Feature |
Benefits |
| Supports Intel® Core™2 Duo Processors with 667 MHz front-side bus and 4 MB L2 cache and Intel® Core™ Duo Processors with 667 MHz front-side bus and 2 MB L2 cache |
Dual-core processor is optimized for multi-threaded applications and multi-tasking, meeting the need for high-performance, low-power applications with small form-factor constraints |
| PCI Express* |
Direct connection between the Memory Controller Hub and PCI Express component/adapters; bandwidth up to 4 GB/s on each x8 PCI Express interface; higher bandwidth and less I/O bottlenecks than PCI-X |
| DDR2-400 memory interface |
Maximum memory bandwidth of 6.4 GB/s
Decreased power consumption - especially important on dense rack, hot-plug controller and blade configurations |
| Intel® 6700PXH 64-bit PCI Hub (Optional) |
Supports two independent 64-bit, 133 MHz PCI-X segments and two hot-plug controllers (one per segment)
Enhancements to PCI/PCI-X performance and platform flexibility |
| Intel® Hub Interface 1.5 connection |
Point-to-point connection between the Memory Controller Hub and the Intel® 6300ESB I/O Controller Hub provides 266 MB/s of bandwidth |
| Advanced Platform RAS |
Features such as memory ECC, Intel® x4 Single Device Data Correction¹ (Intel® x4 SDDC), DIMM sparring, DIMM scrubbing and memory mirroring can improve system reliability
32-bit cyclic redundancy check on PCI Express*
Hot swap PCI Express* enhances serviceability
SMBus port hooks into Intel® E7520 Memory Controller Hub for remote management operation and support for a variety of third-party base management controller and BIOS solutions
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| Product |
Product Code |
Package |
| Intel® E7520 Memory Controller Hub (MCH) |
NQE7520MC |
1077 Flip Chip-Ball Grid Array (FC-BGA) |
| Intel® 6300ESB I/O Controller Hub |
FWE6300ESB |
689 Plastic Ball Grid Array (PBGA) |
| Intel® 6700PXH 64-bit PCI Hub (optional) |
RG82870P2 |
567 Flip Chip-Ball Grid Array (FC-BGA) |
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| Δ Intel® processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across different processor families. See www.intel.com/products/processor_number/ for details. |
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| ¹ In an x4 DDR memory device, the Intel® x4 Single Device Data Correction (Intel® x4 SDDC), provides error detection and correction for one to four data bits within a single device, and provides error detection for up to eight data bits within two devices. |
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