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Intel® 3100 Chipset For Intel® Xeon® processors LV and ULV and Intel® Celeron® processors 1.66 GHz and 1.83 GHz for embedded computing

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Intel® 3100 Chipset

The Intel® 3100 Chipset combines server-class memory and I/O controller functions into a single component, creating the first integrated Intel® chipset specifically optimized for embedded, communications, and storage applications. This single-chip system controller replaces a separate Memory Controller Hub and I/O Controller Hub, significantly conserving board real estate and power consumption.

The 667 MHz front-side bus (FSB) supports Intel® Xeon® processors LV and ULV and the Intel® Celeron® processors 1.66 GHz and 1.83 GHz, addressing the needs of high-performance, low-power platforms within small form factor designs such as PrAMC, Compact PCI* and COM Express*. The Intel Xeon processor LV has a thermal design power (TDP) of 31W; the ULV version has a TDP of 15W; and the Intel Celeron processor has a TDP of 27W.

Product information

Features and benefits

Supports Intel® Xeon® processors LV and ULV Two high-performance cores per platform meet the needs of high-performance, low-power applications with small processors form-factor constraints
Supports Intel® Celeron® processors (1.66 GHz and 1.83 GHz) Single-core solution offers scalable performance and value
40 mm x 40 mm FC-BGA package Requires 50% less board space than prior-generation two-chip chipsetsΔ
PCI Express* Direct connection between the Intel® 3100 Chipset and PCI Express* component/adapters; bandwidth up to 4 GB/s on the x8 PCI Express interface; higher bandwidth and less I/O bottlenecks than PCI-X*
DDR2-400 memory interface Maximum memory bandwidth of 3.2 GB/s

Decreased power consumption—especially important on dense rack, hot-plug controller and blade configurations
Advanced platform RAS Memory ECC, SEC/DED, and DIMM scrubbing can improve system reliability

32-bit ECRC on PCI Express

Hot swap PCI Express enhances serviceability

SMBus port hooks for remote management operation and support for a variety of third-party base management controller and BIOS solutions
GPIO 38 pins (25 dedicated, 13 mux'ed)
USB 2.0 One USB 2.0 host controller with a total of four ports

Supports wakeup from sleeping in S3 and S5 states
Two integrated UARTs (Serial Ports) Supports full function of a standard 16550 UART including hardware flow control interface
32/33-bit PCI bus interface Supports PCI Rev 2.3 specification at 33 MHz

Supports two request/grant pairs
SMBus x2 First SMBus dedicated as slave; second configurable as master or slave
Integrated serial ATA host controllers Six ports provide independent DMA operation in AHCI mode

Four ports support in SATA 1.0a mode
Watchdog timer Multiple modes (WDT and free-running)
Power management ACPI 2.0 support


Product Product Code Thermal Design Power Package
Intel® 3100 Chipset LE3100MICH 10.4–12.4W 1284 flip chip-ball grid array
(FC-BGA3)


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