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Intel® 3100 ChipsetFor Intel® Core™2 Duo processors, Intel® Core™ Duo processors, and Intel® Celeron® M processors on 65nm for embedded computing

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Intel® 3100 Chipset

The Intel® 3100 Chipset combines server-class memory and I/O controller functions into a single component, creating the first integrated Intel® chipset specifically optimized for embedded, communications, and storage applications. This single-chip system controller replaces a separate memory controller hub and I/O controller hub, significantly conserving board real estate and power consumption.


The Intel 3100 Chipset supports the following processors, addressing the needs of high-performance, low-power platforms within small form factor designs such as PrAMC, Compact PCI*, and COM Express*:

  • Intel® Core™2 Duo processor L7400Δ with 667 MHz front-side bus (FSB) and thermal design power (TDP) of 17W
  • Intel® Core™2 Duo processor U7500Δ with 533 MHz FSB and TDP of 10W
  • Intel® Core™ Duo processor ULV U2500Δ with 533 MHz FSB and TDP of 9W
  • Intel® Celeron® M processor ULV 423Δ with 533 MHz FSB and TDP of 5.5W


Product information


Features and benefits

Supports Intel® Core™2 Duo processors L7400Δ, U7500Δ, and Intel® Core™ Duo processor ULV U2500Δ Two high-performance cores per platform meet the needs of high-performance, low-power applications with small form-factor constraints

Intel Core2 Duo processor offers additional performance improvement with Intel® 64 architecture¹, 36 bits of physical address and SSE3 instruction
Supports Intel® Celeron® M processor ULV 423Δ Single-core solution offers scalable performance and value
40 mm x 40 mm FC-BGA package Requires 50% less board space than prior-generation two-chip chipsets²
PCI Express* Direct connection between the Intel® 3100 Chipset and PCI Express component/adapters; bandwidth up to 4 GB/s on the x8 PCI Express interface; higher bandwidth and less I/O bottlenecks than PCI-X*
DDR2-400 memory interface Maximum memory bandwidth of 3.2 GB/s

Decreased power consumption—especially important on dense rack, hot-plug controller, and blade configurations
Advanced platform RAS Memory ECC, SEC/DED, and DIMM scrubbing can improve system reliability

32-bit ECRC on PCI Express

Hot swap PCI Express enhances serviceability

SMBus port hooks for remote management operation and support for a variety of third-party base management controller and BIOS solutions
GPIO 38 pins (25 dedicated,13 mux’ed)
USB 2.0 One USB 2.0 host controller with a total of four ports

Supports wakeup from sleeping in S3 and S5 states
Two integrated UARTs (serial ports) Supports full function of a standard 16550 UART including hardware flow control interface
32/33-bit PCI bus interface Supports PCI Rev 2.3 specification at 33 MHz

Supports two request/grant pairs
40 mm x 40 mm FC-BGA package Requires 50% less board space than prior-generation two-chip chipsets²
SMBus x2 First SMBus dedicated as slave; second configurable as master or slave
Integrated serial ATA host controllers Six ports provide independent DMA operation in AHCI mode

Four ports support in SATA 1.0a mode
Watchdog timer Multiple modes (WDT and free-running)
Power management ACPI 2.0 support


Product Product Code Thermal Design Power Package
Intel® 3100 Chipset LE3100MICH 10.4–12.4W 1284 flip chip-ball grid array
(FC-BGA3)

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