IntelŪ PentiumŪ 4 Processor in 478-pin Package and IntelŪ 845 Chipset Platform for SDR Design Guide Update

This Design Guide Update document is an update to the specifications and information contained in the Intel® Pentium® 4 Processor in 478-pin Package and Intel® 845 Chipset Platform for SDR Design Guide, January 2002. This Design Guide Update may reference other documents listed in the Affected Documents/Related Documents table.

This document is a compilation of updates to the general design considerations; schematic, layout, and routing updates; and documentation changes. This document is intended for hardware system manufacturers and for software developers of applications, operating systems, and tools. The design guide (and this design guide update) is primarily targeted at the PC market segment and was first published in 2002. Those using this design guide and update should check for device availability before designing in any of the components included in this document.

Related Documents:
  • Intel® Pentium® 4 Processor in 478-pin Package and Intel® 845 Chipset Platform for SDR Platform Design Guide, 298354
  • Intel® 845 Chipset: 82845 Memory Controller Hub (MCH) for SDR Datasheet, 290725
  • Intel® 82801BA I/O Controller Hub 2 (ICH2) and Intel® 82801BAM I/O Controller Hub 2 Mobile (ICH2-M) Datasheet, 290687
  • Intel® Pentium® 4 Processor in 478-pin Package and Intel® 845/845E/845G/845GL/845GV/845GE/845PE Chipset Platform Design Guide Addendum for Support with Intel® Celeron® D Processor in 478-pin Package, 303011

File Name/Size:
25042503.pdf

1152369 bytes
Download From:
FTP Server

Web Server (Available for byte serving)