------------------------------------------------------------------------------- -- -- INTEL PROPRIETARY AND CONFIDENTIAL INFORMATION -- Copyright 1998-2002 Intel Corporation All Rights Reserved -- ********************************************************************* -- Intel Corporation makes no warranty for the use of its products -- and assumes no responsibility for any errors which may appear in -- this document nor does it make a commitment to update the information -- contained herein. -- -- Information in this document is provided in connection with Intel products. -- No license, express or implied, by estoppel or otherwise, to any intellectual -- property rights is granted by this document. Except as provided in Intel's -- Terms and Conditions of Sale for such products, Intel assumes no liability -- whatsoever, and Intel disclaims any express or implied warranty, relating to -- sale and/or use of Intel products including liability or warranties relating -- to fitness for a particular purpose, merchantability, or infringement of any -- patent, copyright or other intellectual property right. Intel products are not -- intended for use in medical, life saving, or life sustaining applications. -- -- Intel may make changes to specifications and product descriptions at any -- time, without notice. -- -- The Intel E8870IO (SIOH) may contain design defects or errors known as errata -- which may cause the product to deviate from published specifications. Current -- characterized errata are available on request. -- -- Contact your local Intel sales office or your distributor to obtain the -- latest specifications and before placing your product order. -- -- Intel and Itanium are trademarks or registered trademarks of Intel Corporation -- or its subsidiaries in the United States and in other countries -- -- Other names and brands may be claimed as the property of others. -- ********************************************************************* -- -- -- ------------------------------------------------------------------------------- -- -- DESCRIPTION -- ********************************************************************* -- Boundary-Scan Discription language (BSDL version 0.0) is a means -- of describing essential features of ANSI/IEEE 1149.1-1990 -- compliant devices. This language is under consideration by the IEEE for -- formal inclusion within a supplement. Inclusion with a supplement entails -- an extensive IEEE review and a formal acceptance balloting procedure which -- may change the resultant form of the language. At this time the IEEE does -- not endorse or hold an opinion on the language. -- ********************************************************************* -- -- -- -- -- Intel SIOH NOSPDATA BSDL Model -- Revision history: -- 08/2002 Initial Release -- ------------------------------------------------------------------------------- -- Comments: -- 1. Datasheet naming convention uses # for negative logic signals, but # is not -- a recognized BSDL character and have been replaced with NN in -- signal names in this file. For example, ADS# in the datasheet is same -- as ADSNN in the BSDL. -- 2. Two BSDL files define boundary scan for the SIOH. This BSDL file is -- suitable for generating I/O tests excluding any testing of Scalability Port (SP) data. -- The other BSDL file is suitable for generating I/O tests excluding -- explicit testing of SP Vref. -- ------------------------------------------------------------------------------- -- ENTITY sioh IS GENERIC(PHYSICAL_PIN_MAP: STRING := "BGA_SIOH"); PORT( BUSID0 : IN BIT; BUSID1 : IN BIT; BUSID2 : IN BIT; RSVD0 : IN BIT; RSVD1 : IN BIT; CLK33 : OUT BIT; CLK66 : OUT BIT; RSVD2 : IN BIT; RSVD3 : IN BIT; RSVD4 : OUT BIT; RSVD5 : OUT BIT; RSVD6 : OUT BIT; RSVD7 : OUT BIT; RSVD8 : OUT BIT; RSVD9 : OUT BIT; RSVD10 : OUT BIT; RSVD11 : OUT BIT; RSVD12 : OUT BIT; RSVD13 : OUT BIT; RSVD14 : OUT BIT; RSVD15 : OUT BIT; RSVD16 : OUT BIT; RSVD17 : OUT BIT; RSVD18 : OUT BIT; RSVD19 : OUT BIT; DET : IN BIT; RSVD20 : IN BIT; RSVD21 : INOUT BIT; RSVD22 : INOUT BIT; RSVD23 : INOUT BIT; RSVD24 : IN BIT; RSVD25 : OUT BIT; RSVD26 : INOUT BIT; RSVD27 : INOUT BIT; RSVD28 : INOUT BIT; RSVD29 : INOUT BIT; FBCLK66 : IN BIT; HL0MODESEL : IN BIT; RSVD30 : OUT BIT; HL0PARNN : INOUT BIT; HL0PDNN0 : INOUT BIT; HL0PDNN1 : INOUT BIT; HL0PDNN2 : INOUT BIT; HL0PDNN3 : INOUT BIT; HL0PDNN4 : INOUT BIT; HL0PDNN5 : INOUT BIT; HL0PDNN6 : INOUT BIT; HL0PDNN7 : INOUT BIT; HL0PSTRBN : INOUT BIT; HL0PSTRBP : INOUT BIT; HL0RCOMP : INOUT BIT; HL0RQINNN : IN BIT; HL0RQOUTNN : OUT BIT; HL0STOPNN : INOUT BIT; HL0VREF0 : IN BIT; HL0VREF1 : IN BIT; HL0VSWING : INOUT BIT; RSVD31 : OUT BIT; HL1PD0 : INOUT BIT; HL1PD1 : INOUT BIT; HL1PD10 : INOUT BIT; HL1PD11 : INOUT BIT; HL1PD12 : INOUT BIT; HL1PD13 : INOUT BIT; HL1PD14 : INOUT BIT; HL1PD15 : INOUT BIT; HL1PD16 : INOUT BIT; HL1PD17 : INOUT BIT; HL1PD2 : INOUT BIT; HL1PD3 : INOUT BIT; HL1PD4 : INOUT BIT; HL1PD5 : INOUT BIT; HL1PD6 : INOUT BIT; HL1PD7 : INOUT BIT; HL1PD8 : INOUT BIT; HL1PD9 : INOUT BIT; HL1PSTRBF : INOUT BIT; HL1PSTRBS : INOUT BIT; HL1PUSTRBF : INOUT BIT; HL1PUSTRBS : INOUT BIT; HL1RCOMP : INOUT BIT; HL1RQIN : IN BIT; HL1RQOUT : OUT BIT; HL1RSVD0 : INOUT BIT; HL1RSVD1 : INOUT BIT; HL1STOP : INOUT BIT; HL1VREF0 : IN BIT; HL1VREF1 : IN BIT; HL1VREF2 : IN BIT; HL1VSWING : INOUT BIT; RSVD32 : OUT BIT; HL2PD0 : INOUT BIT; HL2PD1 : INOUT BIT; HL2PD10 : INOUT BIT; HL2PD11 : INOUT BIT; HL2PD12 : INOUT BIT; HL2PD13 : INOUT BIT; HL2PD14 : INOUT BIT; HL2PD15 : INOUT BIT; HL2PD16 : INOUT BIT; HL2PD17 : INOUT BIT; HL2PD2 : INOUT BIT; HL2PD3 : INOUT BIT; HL2PD4 : INOUT BIT; HL2PD5 : INOUT BIT; HL2PD6 : INOUT BIT; HL2PD7 : INOUT BIT; HL2PD8 : INOUT BIT; HL2PD9 : INOUT BIT; HL2PSTRBF : INOUT BIT; HL2PSTRBS : INOUT BIT; HL2PUSTRBF : INOUT BIT; HL2PUSTRBS : INOUT BIT; HL2RCOMP : INOUT BIT; HL2RQIN : IN BIT; HL2RQOUT : OUT BIT; HL2RSVD0 : INOUT BIT; HL2RSVD1 : INOUT BIT; HL2STOP : INOUT BIT; HL2VREF0 : IN BIT; HL2VREF1 : IN BIT; HL2VREF2 : IN BIT; HL2VSWING : INOUT BIT; RSVD33 : OUT BIT; HL3PD0 : INOUT BIT; HL3PD1 : INOUT BIT; HL3PD10 : INOUT BIT; HL3PD11 : INOUT BIT; HL3PD12 : INOUT BIT; HL3PD13 : INOUT BIT; HL3PD14 : INOUT BIT; HL3PD15 : INOUT BIT; HL3PD16 : INOUT BIT; HL3PD17 : INOUT BIT; HL3PD2 : INOUT BIT; HL3PD3 : INOUT BIT; HL3PD4 : INOUT BIT; HL3PD5 : INOUT BIT; HL3PD6 : INOUT BIT; HL3PD7 : INOUT BIT; HL3PD8 : INOUT BIT; HL3PD9 : INOUT BIT; HL3PSTRBF : INOUT BIT; HL3PSTRBS : INOUT BIT; HL3PUSTRBF : INOUT BIT; HL3PUSTRBS : INOUT BIT; HL3RCOMP : INOUT BIT; HL3RQIN : IN BIT; HL3RQOUT : OUT BIT; RSVD34 : INOUT BIT; RSVD35 : INOUT BIT; HL3STOP : INOUT BIT; HL3VREF0 : IN BIT; HL3VREF1 : IN BIT; HL3VREF2 : IN BIT; HL3VSWING : INOUT BIT; RSVD36 : OUT BIT; HL4PD0 : INOUT BIT; HL4PD1 : INOUT BIT; HL4PD10 : INOUT BIT; HL4PD11 : INOUT BIT; HL4PD12 : INOUT BIT; HL4PD13 : INOUT BIT; HL4PD14 : INOUT BIT; HL4PD15 : INOUT BIT; HL4PD16 : INOUT BIT; HL4PD17 : INOUT BIT; HL4PD2 : INOUT BIT; HL4PD3 : INOUT BIT; HL4PD4 : INOUT BIT; HL4PD5 : INOUT BIT; HL4PD6 : INOUT BIT; HL4PD7 : INOUT BIT; HL4PD8 : INOUT BIT; HL4PD9 : INOUT BIT; HL4PSTRBF : INOUT BIT; HL4PSTRBS : INOUT BIT; HL4PUSTRBF : INOUT BIT; HL4PUSTRBS : INOUT BIT; HL4RCOMP : INOUT BIT; HL4RQIN : IN BIT; HL4RQOUT : OUT BIT; HL4RSVD0 : INOUT BIT; HL4RSVD1 : INOUT BIT; HL4STOP : INOUT BIT; HL4VREF0 : IN BIT; HL4VREF1 : IN BIT; HL4VREF2 : IN BIT; HL4VSWING : INOUT BIT; RSVD37 : IN BIT; RSVD38 : IN BIT; RSVD39 : IN BIT; RSVD40 : OUT BIT; RSVD41 : IN BIT; RSVD42 : IN BIT; RSVD42RCTL : IN BIT; RSVD42WCTL : IN BIT; RSVD45 : IN BIT; RSVD46 : IN BIT; RSVD47 : INOUT BIT; LVHSTLODTEN : IN BIT; NC : LINKAGE BIT_VECTOR (11 downto 0); NODEID0 : IN BIT; NODEID1 : IN BIT; NODEID2 : IN BIT; NODEID3 : IN BIT; NODEID4 : IN BIT; RSVD48 : OUT BIT; RSVD49 : OUT BIT; RSVD50 : OUT BIT; RSVD51 : OUT BIT; RSVD52 : OUT BIT; RSVD53 : OUT BIT; RSVD54 : OUT BIT; RSVD55 : IN BIT; RSVD56 : IN BIT; PWRGOOD : IN BIT; RESET66NN : OUT BIT; RESETINN : IN BIT; SCL : INOUT BIT; SDA : INOUT BIT; SP0AD0 : INOUT BIT; SP0AD1 : INOUT BIT; SP0AD10 : INOUT BIT; SP0AD11 : INOUT BIT; SP0AD12 : INOUT BIT; SP0AD13 : INOUT BIT; SP0AD14 : INOUT BIT; SP0AD15 : INOUT BIT; SP0AD2 : INOUT BIT; SP0AD3 : INOUT BIT; SP0AD4 : INOUT BIT; SP0AD5 : INOUT BIT; SP0AD6 : INOUT BIT; SP0AD7 : INOUT BIT; SP0AD8 : INOUT BIT; SP0AD9 : INOUT BIT; SP0AEP0 : INOUT BIT; SP0AEP1 : INOUT BIT; SP0AEP2 : INOUT BIT; SP0ALLC : INOUT BIT; SP0ARSVD : INOUT BIT; SP0ASSO : INOUT BIT; SP0ASTBN0 : INOUT BIT; SP0ASTBN1 : INOUT BIT; SP0ASTBP0 : INOUT BIT; SP0ASTBP1 : INOUT BIT; SP0AVREFH0 : INOUT BIT; SP0AVREFH1 : INOUT BIT; SP0AVREFH2 : INOUT BIT; SP0AVREFH3 : INOUT BIT; SP0AVREFL0 : INOUT BIT; SP0AVREFL1 : INOUT BIT; SP0AVREFL2 : INOUT BIT; SP0AVREFL3 : INOUT BIT; SP0BD0 : INOUT BIT; SP0BD1 : INOUT BIT; SP0BD10 : INOUT BIT; SP0BD11 : INOUT BIT; SP0BD12 : INOUT BIT; SP0BD13 : INOUT BIT; SP0BD14 : INOUT BIT; SP0BD15 : INOUT BIT; SP0BD2 : INOUT BIT; SP0BD3 : INOUT BIT; SP0BD4 : INOUT BIT; SP0BD5 : INOUT BIT; SP0BD6 : INOUT BIT; SP0BD7 : INOUT BIT; SP0BD8 : INOUT BIT; SP0BD9 : INOUT BIT; SP0BEP0 : INOUT BIT; SP0BEP1 : INOUT BIT; SP0BEP2 : INOUT BIT; SP0BLLC : INOUT BIT; SP0BRSVD : INOUT BIT; SP0BSSO : INOUT BIT; SP0BSTBN0 : INOUT BIT; SP0BSTBN1 : INOUT BIT; SP0BSTBP0 : INOUT BIT; SP0BSTBP1 : INOUT BIT; SP0BVREFH0 : INOUT BIT; SP0BVREFH1 : INOUT BIT; SP0BVREFH2 : INOUT BIT; SP0BVREFH3 : INOUT BIT; SP0BVREFL0 : INOUT BIT; SP0BVREFL1 : INOUT BIT; SP0BVREFL2 : INOUT BIT; SP0BVREFL3 : INOUT BIT; SP0GPIO0 : INOUT BIT; SP0GPIO1 : INOUT BIT; SP0PRES : IN BIT; SP0SYNC : INOUT BIT; SP0ZUPD0 : INOUT BIT; SP0ZUPD1 : INOUT BIT; SP1AD0 : INOUT BIT; SP1AD1 : INOUT BIT; SP1AD10 : INOUT BIT; SP1AD11 : INOUT BIT; SP1AD12 : INOUT BIT; SP1AD13 : INOUT BIT; SP1AD14 : INOUT BIT; SP1AD15 : INOUT BIT; SP1AD2 : INOUT BIT; SP1AD3 : INOUT BIT; SP1AD4 : INOUT BIT; SP1AD5 : INOUT BIT; SP1AD6 : INOUT BIT; SP1AD7 : INOUT BIT; SP1AD8 : INOUT BIT; SP1AD9 : INOUT BIT; SP1AEP0 : INOUT BIT; SP1AEP1 : INOUT BIT; SP1AEP2 : INOUT BIT; SP1ALLC : INOUT BIT; SP1ARSVD : INOUT BIT; SP1ASSO : INOUT BIT; SP1ASTBN0 : INOUT BIT; SP1ASTBN1 : INOUT BIT; SP1ASTBP0 : INOUT BIT; SP1ASTBP1 : INOUT BIT; SP1AVREFH0 : INOUT BIT; SP1AVREFH1 : INOUT BIT; SP1AVREFH2 : INOUT BIT; SP1AVREFH3 : INOUT BIT; SP1AVREFL0 : INOUT BIT; SP1AVREFL1 : INOUT BIT; SP1AVREFL2 : INOUT BIT; SP1AVREFL3 : INOUT BIT; SP1BD0 : INOUT BIT; SP1BD1 : INOUT BIT; SP1BD10 : INOUT BIT; SP1BD11 : INOUT BIT; SP1BD12 : INOUT BIT; SP1BD13 : INOUT BIT; SP1BD14 : INOUT BIT; SP1BD15 : INOUT BIT; SP1BD2 : INOUT BIT; SP1BD3 : INOUT BIT; SP1BD4 : INOUT BIT; SP1BD5 : INOUT BIT; SP1BD6 : INOUT BIT; SP1BD7 : INOUT BIT; SP1BD8 : INOUT BIT; SP1BD9 : INOUT BIT; SP1BEP0 : INOUT BIT; SP1BEP1 : INOUT BIT; SP1BEP2 : INOUT BIT; SP1BLLC : INOUT BIT; SP1BRSVD : INOUT BIT; SP1BSSO : INOUT BIT; SP1BSTBN0 : INOUT BIT; SP1BSTBN1 : INOUT BIT; SP1BSTBP0 : INOUT BIT; SP1BSTBP1 : INOUT BIT; SP1BVREFH0 : INOUT BIT; SP1BVREFH1 : INOUT BIT; SP1BVREFH2 : INOUT BIT; SP1BVREFH3 : INOUT BIT; SP1BVREFL0 : INOUT BIT; SP1BVREFL1 : INOUT BIT; SP1BVREFL2 : INOUT BIT; SP1BVREFL3 : INOUT BIT; SP1GPIO0 : INOUT BIT; SP1GPIO1 : INOUT BIT; SP1PRES : IN BIT; SP1SYNC : INOUT BIT; SP1ZUPD0 : INOUT BIT; SP1ZUPD1 : INOUT BIT; RSVD63 : IN BIT; RSVD570 : IN BIT; RSVD5790 : IN BIT; RSVD59 : IN BIT; RSVD60 : IN BIT; SYSCLK : IN BIT; SYSCLKNN : IN BIT; TCK : IN BIT; TDI : IN BIT; RSVD61 : INOUT BIT; RSVD62 : INOUT BIT; TDO : OUT BIT; TMS : IN BIT; TRSTNN : IN BIT; TSO : IN BIT; VCC : LINKAGE BIT_VECTOR(177 downto 0); VCC18 : LINKAGE BIT_VECTOR(4 downto 0); VCC33 : LINKAGE BIT_VECTOR(2 downto 0); VCCACOM : LINKAGE BIT; VCCACORE : LINKAGE BIT; VCCAHL : LINKAGE BIT; VCCASP : LINKAGE BIT; VCCSP : LINKAGE BIT_VECTOR(31 downto 0); VREFFBCLK66 : IN BIT; VSS : LINKAGE BIT_VECTOR(389 downto 0); VSSACOM : LINKAGE BIT; VSSACORE : LINKAGE BIT; VSSAHL : LINKAGE BIT; VSSASP : LINKAGE BIT ); USE STD_1149_1_1994.all; ATTRIBUTE component_conformance OF sioh : ENTITY IS "STD_1149_1_1993"; ATTRIBUTE pin_map OF sioh : ENTITY IS physical_pin_map; CONSTANT BGA_sioh : pin_map_string := --Define PinOut of BGA "BUSID0 : AG13, " & "BUSID1 : AF17, " & "BUSID2 : AD19, " & "RSVD0 : G14, " & "RSVD1 : F14, " & "CLK33 : F13, " & "CLK66 : F11, " & "RSVD2 : F15, " & "RSVD3 : H16, " & "RSVD4 : AE20, " & "RSVD5 : AG22, " & "RSVD6 : AF19, " & "RSVD7 : AH20, " & "RSVD8 : AM22, " & "RSVD9 : AL21, " & "RSVD10 : AL20, " & "RSVD11 : AG19, " & "RSVD12 : AG21, " & "RSVD13 : AJ23, " & "RSVD14 : AJ22, " & "RSVD15 : AF20, " & "RSVD16 : AH21, " & "RSVD17 : AK22, " & "RSVD18 : AK21, " & "RSVD19 : AJ20, " & "DET : G13, " & "RSVD20 : AD18, " & "RSVD21 : AF14, " & "RSVD22 : AE15, " & "RSVD23 : AG12, " & "RSVD24 : AH23, " & "RSVD25 : AE18, " & "RSVD26 : AM20, " & "RSVD27 : AJ19, " & "RSVD28 : AK19, " & "RSVD29 : AM19, " & "FBCLK66 : J22, " & "HL0MODESEL : C17, " & "RSVD30 : E22, " & "HL0PARNN : E20, " & "HL0PDNN0 : A22, " & "HL0PDNN1 : C22, " & "HL0PDNN2 : B21, " & "HL0PDNN3 : D21, " & "HL0PDNN4 : C20, " & "HL0PDNN5 : D19, " & "HL0PDNN6 : A18, " & "HL0PDNN7 : C18, " & "HL0PSTRBN : B19, " & "HL0PSTRBP : A20, " & "HL0RCOMP : E17, " & "HL0RQINNN : F18, " & "HL0RQOUTNN : F19, " & "HL0STOPNN : E18, " & "HL0VREF0 : B17, " & "HL0VREF1 : F21, " & "HL0VSWING : F17, " & "RSVD31 : AG9, " & "HL1PD0 : AM6, " & "HL1PD1 : AK6, " & "HL1PD10 : AK12, " & "HL1PD11 : AL13, " & "HL1PD12 : AJ13, " & "HL1PD13 : AL15, " & "HL1PD14 : AJ15, " & "HL1PD15 : AM16, " & "HL1PD8 : AJ11, " & "HL1PD17 : AK16, " & "HL1PD2 : AL7, " & "HL1PD3 : AJ7, " & "HL1PD4 : AM8, " & "HL1PD5 : AJ9, " & "HL1PD6 : AM10, " & "HL1PD7 : AK10, " & "HL1PD16 : AL11, " & "HL1PD9 : AM12, " & "HL1PSTRBF : AL9, " & "HL1PSTRBS : AK8, " & "HL1PUSTRBF : AK14, " & "HL1PUSTRBS : AM14, " & "HL1RCOMP : AH6, " & "HL1RQIN : AH12, " & "HL1RQOUT : AH16, " & "HL1RSVD0 : AG6, " & "HL1RSVD1 : AG7, " & "HL1STOP : AH14, " & "HL1VREF0 : AE6, " & "HL1VREF1 : AH10, " & "HL1VREF2 : AG10, " & "HL1VSWING : AH8, " & "RSVD32 : AB6, " & "HL2PD0 : U1, " & "HL2PD1 : U3, " & "HL2PD10 : AC3, " & "HL2PD11 : AD2, " & "HL2PD12 : AD4, " & "HL2PD13 : AF2, " & "HL2PD14 : AF4, " & "HL2PD15 : AG1, " & "HL2PD8 : AB4, " & "HL2PD17 : AG3, " & "HL2PD2 : V2, " & "HL2PD3 : V4, " & "HL2PD4 : W1, " & "HL2PD5 : Y4, " & "HL2PD6 : AA1, " & "HL2PD7 : AA3, " & "HL2PD16 : AB2, " & "HL2PD9 : AC1, " & "HL2PSTRBF : Y2, " & "HL2PSTRBS : W3, " & "HL2PUSTRBF : AE3, " & "HL2PUSTRBS : AE1, " & "HL2RCOMP : U5, " & "HL2RQIN : AC5, " & "HL2RQOUT : AG5, " & "HL2RSVD0 : V6, " & "HL2RSVD1 : Y6, " & "HL2STOP : AE5, " & "HL2VREF0 : U6, " & "HL2VREF1 : AA5, " & "HL2VREF2 : AD6, " & "HL2VSWING : W5, " & "RSVD33 : R6, " & "HL3PD0 : E1, " & "HL3PD1 : E3, " & "HL3PD10 : L3, " & "HL3PD11 : M2, " & "HL3PD12 : M4, " & "HL3PD13 : P2, " & "HL3PD14 : P4, " & "HL3PD15 : R1, " & "HL3PD8 : K4, " & "HL3PD17 : R3, " & "HL3PD2 : F2, " & "HL3PD3 : F4, " & "HL3PD4 : G1, " & "HL3PD5 : H4, " & "HL3PD6 : J1, " & "HL3PD7 : J3, " & "HL3PD16 : K2, " & "HL3PD9 : L1, " & "HL3PSTRBF : H2, " & "HL3PSTRBS : G3, " & "HL3PUSTRBF : N3, " & "HL3PUSTRBS : N1, " & "HL3RCOMP : E5, " & "HL3RQIN : L5, " & "HL3RQOUT : R5, " & "RSVD34 : M6, " & "RSVD35 : N6, " & "HL3STOP : N5, " & "HL3VREF0 : K6, " & "HL3VREF1 : J5, " & "HL3VREF2 : T5, " & "HL3VSWING : G5, " & "RSVD36 : G7, " & "HL4PD0 : A16, " & "HL4PD1 : C16, " & "HL4PD10 : C10, " & "HL4PD11 : B9, " & "HL4PD12 : D9, " & "HL4PD13 : B7, " & "HL4PD14 : D7, " & "HL4PD15 : A6, " & "HL4PD8 : D11, " & "HL4PD17 : C6, " & "HL4PD2 : B15, " & "HL4PD3 : D15, " & "HL4PD4 : A14, " & "HL4PD5 : D13, " & "HL4PD6 : A12, " & "HL4PD7 : C12, " & "HL4PD16 : B11, " & "HL4PD9 : A10, " & "HL4PSTRBF : B13, " & "HL4PSTRBS : C14, " & "HL4PUSTRBF : C8, " & "HL4PUSTRBS : A8, " & "HL4RCOMP : E16, " & "HL4RQIN : E10, " & "HL4RQOUT : E6, " & "HL4RSVD0 : F8, " & "HL4RSVD1 : F6, " & "HL4STOP : E8, " & "HL4VREF0 : F9, " & "HL4VREF1 : E12, " & "HL4VREF2 : H6, " & "HL4VSWING : E14, " & "RSVD37 : G9, " & "RSVD38 : H8, " & "RSVD39 : J18, " & "RSVD40 : AC22, " & "RSVD41 : AG16, " & "RSVD42 : AF10, " & "RSVD42RCTL : AE11, " & "RSVD42WCTL : AF8, " & "RSVD45 : AF7, " & "RSVD46 : AG15, " & "RSVD47 : AD21, " & "LVHSTLODTEN : F10, " & "NC : ( AA6, AB28, AB7, AD28, AE27, AF24, " & " G24, H27, J28, L28, T2, T4 ), " & "NODEID0 : AC19, " & "NODEID1 : AC20, " & "NODEID2 : AE21, " & "NODEID3 : AF22, " & "NODEID4 : AG23, " & "RSVD48 : H17, " & "RSVD49 : H12, " & "RSVD50 : H11, " & "RSVD51 : G16, " & "RSVD52 : G18, " & "RSVD53 : G10, " & "RSVD54 : G12, " & "RSVD55 : H13, " & "RSVD56 : G17, " & "PWRGOOD : AL18, " & "RESET66NN : AK18, " & "RESETINN : AG18, " & "SCL : AD16, " & "SDA : AC17, " & "SP0AD0 : AD30, " & "SP0AD1 : AF30, " & "SP0AD10 : AK24, " & "SP0AD11 : AL29, " & "SP0AD12 : AM28, " & "SP0AD13 : AM24, " & "SP0AD14 : AL23, " & "SP0AD15 : AM26, " & "SP0AD2 : AH32, " & "SP0AD3 : AH30, " & "SP0AD4 : AK32, " & "SP0AD5 : AL31, " & "SP0AD6 : AK28, " & "SP0AD7 : AK30, " & "SP0AD8 : AF26, " & "SP0AD9 : AH24, " & "SP0AEP0 : AH28, " & "SP0AEP1 : AF28, " & "SP0AEP2 : AF32, " & "SP0ALLC : AH26, " & "SP0ARSVD : AK26, " & "SP0ASSO : AM30, " & "SP0ASTBN0 : AG29, " & "SP0ASTBN1 : AJ25, " & "SP0ASTBP0 : AG31, " & "SP0ASTBP1 : AJ27, " & "SP0AVREFH0 : AE29, " & "SP0AVREFH1 : AJ31, " & "SP0AVREFH2 : AG25, " & "SP0AVREFH3 : AL27, " & "SP0AVREFL0 : AE31, " & "SP0AVREFL1 : AJ29, " & "SP0AVREFL2 : AG27, " & "SP0AVREFL3 : AL25, " & "SP0BD0 : AD32, " & "SP0BD1 : AB32, " & "SP0BD10 : AA27, " & "SP0BD11 : Y24, " & "SP0BD12 : V24, " & "SP0BD13 : U25, " & "SP0BD14 : U27, " & "SP0BD15 : V26, " & "SP0BD2 : Y30, " & "SP0BD3 : Y32, " & "SP0BD4 : V30, " & "SP0BD5 : U31, " & "SP0BD6 : U29, " & "SP0BD7 : V32, " & "SP0BD8 : AE25, " & "SP0BD9 : AC27, " & "SP0BEP0 : V28, " & "SP0BEP1 : Y28, " & "SP0BEP2 : AB30, " & "SP0BLLC : AC25, " & "SP0BRSVD : AA25, " & "SP0BSSO : Y26, " & "SP0BSTBN0 : AA31, " & "SP0BSTBN1 : AB26, " & "SP0BSTBP0 : AA29, " & "SP0BSTBP1 : AB24, " & "SP0BVREFH0 : AC29, " & "SP0BVREFH1 : W29, " & "SP0BVREFH2 : AD26, " & "SP0BVREFH3 : W25, " & "SP0BVREFL0 : AC31, " & "SP0BVREFL1 : W31, " & "SP0BVREFL2 : AD24, " & "SP0BVREFL3 : W27, " & "SP0GPIO0 : Y23, " & "SP0GPIO1 : AB23, " & "SP0PRES : M23, " & "SP0SYNC : P23, " & "SP0ZUPD0 : T23, " & "SP0ZUPD1 : V23, " & "SP1AD0 : J32, " & "SP1AD1 : L32, " & "SP1AD10 : M27, " & "SP1AD11 : N24, " & "SP1AD12 : R24, " & "SP1AD13 : T25, " & "SP1AD14 : T27, " & "SP1AD15 : R26, " & "SP1AD2 : N30, " & "SP1AD3 : N32, " & "SP1AD4 : R30, " & "SP1AD5 : T31, " & "SP1AD6 : T29, " & "SP1AD7 : R32, " & "SP1AD8 : H25, " & "SP1AD9 : K27, " & "SP1AEP0 : R28, " & "SP1AEP1 : N28, " & "SP1AEP2 : L30, " & "SP1ALLC : K25, " & "SP1ARSVD : M25, " & "SP1ASSO : N26, " & "SP1ASTBN0 : M31, " & "SP1ASTBN1 : L26, " & "SP1ASTBP0 : M29, " & "SP1ASTBP1 : L24, " & "SP1AVREFH0 : K31, " & "SP1AVREFH1 : P29, " & "SP1AVREFH2 : J26, " & "SP1AVREFH3 : P25, " & "SP1AVREFL0 : K29, " & "SP1AVREFL1 : P31, " & "SP1AVREFL2 : J24, " & "SP1AVREFL3 : P27, " & "SP1BD0 : J30, " & "SP1BD1 : G30, " & "SP1BD10 : C24, " & "SP1BD11 : B29, " & "SP1BD12 : A28, " & "SP1BD13 : A24, " & "SP1BD14 : B23, " & "SP1BD15 : A26, " & "SP1BD2 : E32, " & "SP1BD3 : E30, " & "SP1BD4 : C32, " & "SP1BD5 : B31, " & "SP1BD6 : C28, " & "SP1BD7 : C30, " & "SP1BD8 : G26, " & "SP1BD9 : E24, " & "SP1BEP0 : E28, " & "SP1BEP1 : G32, " & "SP1BEP2 : G28, " & "SP1BLLC : E26, " & "SP1BRSVD : C26, " & "SP1BSSO : A30, " & "SP1BSTBN0 : F29, " & "SP1BSTBN1 : D25, " & "SP1BSTBP0 : F31, " & "SP1BSTBP1 : D27, " & "SP1BVREFH0 : H29, " & "SP1BVREFH1 : D31, " & "SP1BVREFH2 : F25, " & "SP1BVREFH3 : B27, " & "SP1BVREFL0 : H31, " & "SP1BVREFL1 : D29, " & "SP1BVREFL2 : F27, " & "SP1BVREFL3 : B25, " & "SP1GPIO0 : AD23, " & "SP1GPIO1 : AE23, " & "SP1PRES : F23, " & "SP1SYNC : G23, " & "SP1ZUPD0 : H23, " & "SP1ZUPD1 : K23, " & "RSVD63 : D23, " & "RSVD570 : H15, " & "RSVD5790 : H9, " & "RSVD59 : AA23, " & "RSVD60 : AD22, " & "SYSCLK : J20, " & "SYSCLKNN : H19, " & "TCK : AM17, " & "TDI : AJ17, " & "RSVD61 : AF16, " & "RSVD62 : AB17, " & "TDO : AH17, " & "TMS : AH18, " & "TRSTNN : AL17, " & "TSO : AK17, " & "VCC : ( A11, A4, AA10, AA12, AA14, AA16, AA18, AA20, AA22, " & " AA8, AB1, AB10, AB13, AB15, AB19, AB21, AB3, AC12, " & " AC18, AD14, AD20, AD8, AE10, AE22, AF12, AF18, AF5, " & " AG14, AG2, AG20, AG8, AH15, AH2, AH22, AH4, AH9, " & " AJ1, AJ18, AJ3, AJ5, AJ6, AK11, AK2, AK20, AK4, " & " AL16, AL22, AL3, AL5, AM11, AM18, AM4, B3, B5, " & " B6, C11, C2, C4, D1, D16, D3, D5, E13, E4, E7, " & " G11, G15, H5, H7, J10, J11, J12, J13, J14, J15, " & " J16, J17, J7, J8, J9, K1, K10, K11, K13, " & " K14, K15, K17, K18, K3, K7, K9, L10, L11, " & " L12, L14, L16, L18, L22, L7, L8, L9, M10, " & " M11, M13, M15, M17, M19, M21, M7, M9, " & " N10, N12, N14, N16, N18, N20, N22, N8, " & " P11, P13, P15, P17, P19, P21, P5, P7, P9, " & " R10, R12, R14, R16, R18, R2, R20, R22, R8, " & " T11, T13, T15, T17, T19, T21, T7, T9, " & " U10, U12, U14, U16, U18, U20, U22, U4, U8, " & " V11, V13, V15, V17, V19, V21, V7, V9, " & " W10, W12, W14, W16, W18, W20, W22, W8, " & " Y11, Y13, Y15, Y17, Y19, Y21, Y5, Y7, Y9 ) , " & "VCC18 : ( A17, C21, D18, F20, " & " F22 ), " & "VCC33 : ( AE16, K20, " & " L20 ), " & "VCCACOM : K19, " & "VCCACORE : G20, " & "VCCAHL : J19, " & "VCCASP : H20, " & "VCCSP : ( AA26, AA30, AC24, AC28, AE26, AE30, AG24, AG28, " & " AJ26, AJ30, AL24, AL28, B24, B28, D26, D30, F24, " & " F28, H26, H30, K24, K28, M26, M30, P24, P28, T26, " & " T30, U26, U30, W24, W28 ), " & "VREFFBCLK66 : K22, " & "VSS : ( A13, A15, A19, A21, A23, A25, A27, A29, A3, A5, A7, A9, " & " AA11, AA13, AA15, AA17, AA19, AA2, AA21, AA24, AA28, " & " AA32, AA4, AA7, AA9, AB11, AB12, AB14, AB16, AB18, " & " AB20, AB22, AB25, AB27, AB29, AB31, AB5, AB8, AB9, " & " AC10, AC11, AC13, AC14, AC15, AC16, AC2, AC21, AC23, " & " AC26, AC30, AC32, AC4, AC6, AC7, AC8, AC9, AD1, AD10, " & " AD11, AD12, AD13, AD15, AD17, AD25, AD27, AD29, AD3, " & " AD31, AD5, AD7, AD9, AE12, AE13, AE14, AE17, AE19, " & " AE2, AE24, AE28, AE32, AE4, AE7, AE8, AE9, AF1, " & " AF11, AF13, AF15, AF21, AF23, AF25, AF27, AF29, " & " AF3, AF31, AF6, AF9, AG11, AG17, AG26, AG30, " & " AG32, AG4, AH1, AH11, AH13, AH19, AH25, AH27, " & " AH29, AH3, AH31, AH5, AH7, AJ10, AJ12, AJ14, " & " AJ16, AJ2, AJ21, AJ24, AJ28, AJ32, AJ4, AJ8, " & " AK1, AK13, AK15, AK23, AK25, AK27, AK29, AK3, " & " AK31, AK5, AK7, AK9, AL10, AL12, AL14, AL19, " & " AL2, AL26, AL30, AL4, AL6, AL8, AM13, AM15, AM21, " & " AM23, AM25, AM27, AM29, AM3, AM5, AM7, AM9, " & " B10, B12, B14, B16, B18, B2, B20, B22, B26, " & " B30, B4, B8, C1, C13, C15, C19, " & " C23, C25, C27, C29, C3, C31, C5, C7, C9, " & " D10, D12, D14, D17, D2, D20, D22, D24, D28, D32, " & " D4, D6, D8, E11, E15, E19, E2, E21, E23, " & " E25, E27, E29, E31, E9, F1, F12, F16, F26, " & " F3, F30, F32, F5, F7, G19, G2, G25, G27, G29, " & " G31, G4, G6, G8, H1, H10, H14, H18, H22, H24, H28, " & " H3, H32, J2, J21, J23, J25, J27, J29, J31, J4, J6, " & " K12, K16, K26, K30, K32, K5, K8, " & " L13, L15, L17, L19, L2, L21, L23, L25, L27, L29, " & " L31, L4, L6, M1, M12, M14, M16, M18, M20, M22, M24, M28, " & " M3, M32, M5, M8, N11, N13, N15, N17, N19, " & " N2, N21, N23, N25, N27, N29, N31, N4, N7, N9, " & " P1, P10, P12, P14, P16, P18, P20, P22, P26, " & " P3, P30, P32, P6, P8, R11, R13, R15, R17, R19, " & " R21, R23, R25, R27, R29, R31, R4, R7, R9, " & " T1, T10, T12, T14, T16, T18, T20, T22, T24, T28, " & " T3, T32, T6, T8, U11, U13, U15, U17, U19, U2, " & " U21, U23, U24, U28, U32, U7, U9, " & " V1, V10, V12, V14, V16, V18, V20, V22, V25, V27, V29, " & " V3, V31, V5, V8, W11, W13, W15, W17, W19, " & " W2, W21, W23, W26, W30, W32, W4, W6, W7, W9, " & " Y1, Y10, Y12, Y14, Y16, Y18, Y20, Y22, " & " Y25, Y27, Y29, Y3, Y31, Y8 ), " & "VSSACOM : K21, " & "VSSACORE : G21, " & "VSSAHL : G22, " & "VSSASP : H21 " ; ATTRIBUTE port_grouping OF sioh : ENTITY IS "Differential_Voltage ( (SP0BSTBN1 , SP0BSTBP1 ), " & " (SP0BSTBN0 , SP0BSTBP0 ), " & " (SP0ASTBN1 , SP0ASTBP1 ), " & " (SP0ASTBN0 , SP0ASTBP0 ), " & " (SP1BSTBN1 , SP1BSTBP1 ), " & " (SP1BSTBN0 , SP1BSTBP0 ), " & " (SP1ASTBN1 , SP1ASTBP1 ), " & " (SP1ASTBN0 , SP1ASTBP0 ), " & " (HL0PSTRBP , HL0PSTRBN ), " & " (HL4PSTRBS , HL4PSTRBF ), " & " (HL4PUSTRBS, HL4PUSTRBF), " & " (HL3PSTRBS , HL3PSTRBF ), " & " (HL3PUSTRBS, HL3PUSTRBF), " & " (HL2PSTRBS , HL2PSTRBF ), " & " (HL2PUSTRBS, HL2PUSTRBF), " & " (HL1PSTRBS , HL1PSTRBF ), " & " (HL1PUSTRBS, HL1PUSTRBF) )" ; -- Scan Port Identification ATTRIBUTE tap_scan_in OF tdi : SIGNAL IS true; ATTRIBUTE tap_scan_mode OF tms : SIGNAL IS true; ATTRIBUTE tap_scan_out OF tdo : SIGNAL IS true; ATTRIBUTE tap_scan_reset OF trstnn : SIGNAL IS true; ATTRIBUTE tap_scan_clock OF tck : SIGNAL IS (10.0E6, both); -- -- -- Instruction Register and Instructions -- ATTRIBUTE instruction_length OF sioh: ENTITY IS 7; ATTRIBUTE instruction_opcode OF sioh: entity IS "EXTEST (0000000), " & "SAMPLE (0000001), " & -- "IDCODE (0000010), " & "IDCODE (0000010), " & -- "INTEST (0000011), " & "CLAMP (0000100), " & "HIGHZ (0001000), " & "BYPASS (1111111), " & "PRIVATE (1000000,1000001,1000010,1000011,1000100,1000101,1000110,1000111,1001000,1001001,1001010,1001011,1001100," & " 1001101,1010010,1010011,1010100,1100001)"; -- -- -- ATTRIBUTE instruction_capture OF sioh: ENTITY IS "0000001"; -- ATTRIBUTE instruction_disable OF sioh: ENTITY IS "INTEST"; ATTRIBUTE instruction_private OF sioh: ENTITY IS "PRIVATE"; -- -- SET_JTAG_MANUFACTURER_ID 9 -- SET_JTAG_PART_NUMBER 84EA -- SET_JTAG_VERSION_NUMBER 2 -- ATTRIBUTE idcode_register OF sioh: ENTITY IS "0010" & -- Version, C0-step "1000010011101010" & -- Part Number "00000001001" & -- manufacturers identity "1"; -- Required by the standard ATTRIBUTE register_access OF sioh: ENTITY IS "BOUNDARY (EXTEST, SAMPLE), " & -- "BOUNDARY (EXTEST, SAMPLE, INTEST), " & -- "IDCODE (IDCODE), " & "DEVICE_ID (IDCODE), " & "BYPASS (CLAMP, HIGHZ, BYPASS)"; -- ATTRIBUTE boundary_cells OF sioh: ENTITY IS "BC_1,BC_2,BC_4,BC_7"; ATTRIBUTE boundary_length OF sioh: ENTITY IS 571; ATTRIBUTE boundary_register OF sioh: ENTITY IS "0 (BC_7 , SP0GPIO1 , bidir , X , 1 , 0 , Z ), "& "1 (BC_2 , * , control , 0 ), " & "2 (BC_4 , RSVD59 , input , X ), "& "3 (BC_2 , * , internal , 0 ), " & "4 (BC_7 , SP0GPIO0 , bidir , X , 5 , 0 , Z ), "& "5 (BC_2 , * , control , 0 ), " & "6 (BC_7 , RSVD22 , bidir , X , 7 , 0 , Z ), "& "7 (BC_2 , * , control , 0 ), " & "8 (BC_7 , RSVD21 , bidir , X , 9 , 0 , Z ), "& "9 (BC_2 , * , control , 0 ), " & "10 (BC_7 , RSVD23 , bidir , X , 11 , 0 , Z ), "& "11 (BC_2 , * , control , 0 ), " & "12 (BC_4 , BUSID0 , input , X ), "& "13 (BC_2 , * , internal , 0 ), " & "14 (BC_4 , TSO , input , X ), "& "15 (BC_2 , * , internal , 0 ), " & "16 (BC_7 , SCL , bidir , X , 17 , 0 , Z ), "& "17 (BC_2 , * , control , 0 ), " & "18 (BC_7 , SDA , bidir , X , 19 , 0 , Z ), "& "19 (BC_2 , * , control , 0 ), " & "20 (BC_4 , RSVD42RCTL , input , X ), "& "21 (BC_2 , * , internal , 0 ), " & "22 (BC_4 , RSVD42WCTL , input , X ), "& "23 (BC_2 , * , internal , 0 ), " & "24 (BC_4 , RSVD45 , input , X ), "& "25 (BC_2 , * , internal , 0 ), " & "26 (BC_4 , RSVD42 , input , X ), "& "27 (BC_2 , * , internal , 0 ), " & "28 (BC_7 , SP1GPIO1 , bidir , X , 29 , 0 , Z ), "& "29 (BC_2 , * , control , 0 ), " & "30 (BC_7 , SP1GPIO0 , bidir , X , 31 , 0 , Z ), "& "31 (BC_2 , * , control , 0 ), " & "32 (BC_4 , PWRGOOD , input , X ), "& "33 (BC_2 , * , internal , 0 ), " & "34 (BC_1 , RESET66NN , output3 , X , 35 , 0 , Z ), "& "35 (BC_2 , * , control , 0 ), " & "36 (BC_4 , RESETINN , input , X ), "& "37 (BC_2 , * , internal , 0 ), " & "38 (BC_4 , BUSID1 , input , X ), "& "39 (BC_2 , * , internal , 0 ), " & "40 (BC_7 , RSVD47 , bidir , X , 41 , 0 , Z ), "& "41 (BC_2 , * , control , 0 ), " & "42 (BC_4 , RSVD46 , input , X ), "& "43 (BC_2 , * , internal , 0 ), " & "44 (BC_7 , RSVD29 , bidir , X , 45 , 0 , Z ), "& "45 (BC_2 , * , control , 0 ), " & "46 (BC_7 , RSVD27 , bidir , X , 47 , 0 , Z ), "& "47 (BC_2 , * , control , 0 ), " & "48 (BC_7 , RSVD28 , bidir , X , 49 , 0 , Z ), "& "49 (BC_2 , * , control , 0 ), " & "50 (BC_1 , RSVD11 , output3 , X , 51 , 0 , Z ), "& "51 (BC_2 , * , control , 0 ), " & "52 (BC_7 , RSVD26 , bidir , X , 53 , 0 , Z ), "& "53 (BC_2 , * , control , 0 ), " & "54 (BC_1 , RSVD10 , output3 , X , 55 , 0 , Z ), "& "55 (BC_2 , * , control , 0 ), " & "56 (BC_4 , RSVD41 , input , X ), "& "57 (BC_2 , * , internal , 0 ), " & "58 (BC_4 , RSVD60 , input , X ), "& "59 (BC_2 , * , internal , 0 ), " & "60 (BC_4 , RSVD20 , input , X ), "& "61 (BC_2 , * , internal , 0 ), " & "62 (BC_1 , RSVD9 , output3 , X , 63 , 0 , Z ), "& "63 (BC_2 , * , control , 0 ), " & "64 (BC_1 , RSVD7 , output3 , X , 65 , 0 , Z ), "& "65 (BC_2 , * , control , 0 ), " & "66 (BC_1 , RSVD8 , output3 , X , 67 , 0 , Z ), "& "67 (BC_2 , * , control , 0 ), " & "68 (BC_1 , RSVD19 , output3 , X , 69 , 0 , Z ), "& "69 (BC_2 , * , control , 0 ), " & "70 (BC_1 , RSVD6 , output3 , X , 71 , 0 , Z ), "& "71 (BC_2 , * , control , 0 ), " & "72 (BC_1 , RSVD18 , output3 , X , 73 , 0 , Z ), "& "73 (BC_2 , * , control , 0 ), " & "74 (BC_1 , RSVD25 , output3 , X , 75 , 0 , Z ), "& "75 (BC_2 , * , control , 0 ), " & "76 (BC_1 , RSVD40 , output3 , X , 77 , 0 , Z ), "& "77 (BC_2 , * , control , 0 ), " & "78 (BC_1 , RSVD17 , output3 , X , 79 , 0 , Z ), "& "79 (BC_2 , * , control , 0 ), " & "80 (BC_1 , RSVD15 , output3 , X , 81 , 0 , Z ), "& "81 (BC_2 , * , control , 0 ), " & "82 (BC_1 , RSVD16 , output3 , X , 83 , 0 , Z ), "& "83 (BC_2 , * , control , 0 ), " & "84 (BC_1 , RSVD14 , output3 , X , 85 , 0 , Z ), "& "85 (BC_2 , * , control , 0 ), " & "86 (BC_1 , RSVD12 , output3 , X , 87 , 0 , Z ), "& "87 (BC_2 , * , control , 0 ), " & "88 (BC_1 , RSVD13 , output3 , X , 89 , 0 , Z ), "& "89 (BC_2 , * , control , 0 ), " & "90 (BC_4 , BUSID2 , input , X ), "& "91 (BC_2 , * , internal , 0 ), " & "92 (BC_4 , NODEID0 , input , X ), "& "93 (BC_2 , * , internal , 0 ), " & "94 (BC_4 , RSVD24 , input , X ), "& "95 (BC_2 , * , internal , 0 ), " & "96 (BC_1 , RSVD4 , output3 , X , 97 , 0 , Z ), "& "97 (BC_2 , * , control , 0 ), " & "98 (BC_1 , RSVD5 , output3 , X , 99 , 0 , Z ), "& "99 (BC_2 , * , control , 0 ), " & "100 (BC_4 , NODEID3 , input , X ), "& "101 (BC_2 , * , internal , 0 ), " & "102 (BC_4 , NODEID4 , input , X ), "& "103 (BC_2 , * , internal , 0 ), " & "104 (BC_4 , NODEID2 , input , X ), "& "105 (BC_2 , * , internal , 0 ), " & "106 (BC_4 , NODEID1 , input , X ), "& "107 (BC_2 , * , internal , 0 ), " & "108 (BC_2 , * , control , 1 ), " & --SP0OEINT "109 (BC_7 , SP0SYNC , bidir , X , 108 , 1 , Z ), " & --SP0SYNC "110 (BC_4 , SP0PRES , input , X ), " & --SP0PRES "111 (BC_2 , * , internal, 0 ), " & --SP0BD13 "112 (BC_2 , * , internal, 0 ), " & --SP0BD14 "113 (BC_2 , * , internal, 0 ), " & --SP0BD12 "114 (BC_2 , * , internal, 0 ), " & --SP0BD15 "115 (BC_7 , SP0BVREFH3 , bidir , X , 108 , 1 , Z ), " & --SP0BVREFH3 "116 (BC_2 , * , internal, 1 ), " & --SP0BVREFH3_CHK "117 (BC_7 , SP0BVREFL3 , bidir , X , 108 , 1 , Z ), " & --SP0BVREFL3 "118 (BC_2 , * , internal, 1 ), " & --SP0BVREFL3_CHK "119 (BC_2 , * , internal, 0 ), " & --SP0BD11 "120 (BC_2 , * , internal, 0 ), " & --SP0BSSO "121 (BC_2 , * , internal, 0 ), " & --SP0BD10 "122 (BC_2 , * , internal, 0 ), " & --SP0BRSVD "123 (BC_2 , * , internal, 0 ), " & --SP0BSTBN1 "124 (BC_2 , * , internal, 0 ), " & --SP0BSTBP1 "125 (BC_2 , * , internal, 0 ), " & --SP0BD9 "126 (BC_2 , * , internal, 0 ), " & --SP0BLLC "127 (BC_7 , SP0BVREFL2 , bidir , X , 108 , 1 , Z ), " & --SP0BVREFL2 "128 (BC_2 , * , internal, 1 ), " & --SP0BVREFL2_CHK "129 (BC_7 , SP0BVREFH2 , bidir , X , 108 , 1 , Z ), " & --SP0BVREFH2 "130 (BC_2 , * , internal, 1 ), " & --SP0BVREFH2_CHK "131 (BC_2 , * , internal, 0 ), " & --SP0BD8 "132 (BC_2 , * , internal, 0 ), " & --SP0BD6 "133 (BC_2 , * , internal, 0 ), " & --SP0BD5 "134 (BC_2 , * , internal, 0 ), " & --SP0BD4 "135 (BC_2 , * , internal, 0 ), " & --SP0BD7 "136 (BC_7 , SP0BVREFH1 , bidir , X , 108 , 1 , Z ), " & --SP0BVREFH1 "137 (BC_2 , * , internal, 1 ), " & --SP0BVREFH1_CHK "138 (BC_7 , SP0BVREFL1 , bidir , X , 108 , 1 , Z ), " & --SP0BVREFL1 "139 (BC_2 , * , internal, 1 ), " & --SP0BVREFL1_CHK "140 (BC_2 , * , internal, 0 ), " & --SP0BD3 "141 (BC_2 , * , internal, 0 ), " & --SP0BEP0 "142 (BC_2 , * , internal, 0 ), " & --SP0BD2 "143 (BC_2 , * , internal, 0 ), " & --SP0BEP1 "144 (BC_2 , * , internal, 0 ), " & --SP0BSTBN0 "145 (BC_2 , * , internal, 0 ), " & --SP0BSTBP0 "146 (BC_2 , * , internal, 0 ), " & --SP0BD1 "147 (BC_2 , * , internal, 0 ), " & --SP0BEP2 "148 (BC_7 , SP0BVREFL0 , bidir , X , 108 , 1 , Z ), " & --SP0BVREFL0 "149 (BC_2 , * , internal, 1 ), " & --SP0BVREFL0_CHK "150 (BC_7 , SP0BVREFH0 , bidir , X , 108 , 1 , Z ), " & --SP0BVREFH0 "151 (BC_2 , * , internal, 1 ), " & --SP0BVREFH0_CHK "152 (BC_2 , * , internal, 0 ), " & --SP0BD0 "153 (BC_2 , * , internal, 0 ), " & --SP0AD13 "154 (BC_2 , * , internal, 0 ), " & --SP0AD14 "155 (BC_2 , * , internal, 0 ), " & --SP0AD12 "156 (BC_2 , * , internal, 0 ), " & --SP0AD15 "157 (BC_7 , SP0AVREFH3 , bidir , X , 108 , 1 , Z ), " & --SP0AVREFH3 "158 (BC_2 , * , internal, 1 ), " & --SP0AVREFH3_CHK "159 (BC_7 , SP0AVREFL3 , bidir , X , 108 , 1 , Z ), " & --SP0AVREFL3 "160 (BC_2 , * , internal, 1 ), " & --* --SP0AVREFL3_CHK "161 (BC_2 , * , internal, 0 ), " & --SP0AD11 "162 (BC_2 , * , internal, 0 ), " & --SP0ASSO "163 (BC_2 , * , internal, 0 ), " & --SP0AD10 "164 (BC_2 , * , internal, 0 ), " & --SP0ARSVD "165 (BC_2 , * , internal, 0 ), " & --SP0ASTBN1 "166 (BC_2 , * , internal, 0 ), " & --SP0ASTBP1 "167 (BC_2 , * , internal, 0 ), " & --SP0AD9 "168 (BC_2 , * , internal, 0 ), " & --SP0ALLC "169 (BC_7 , SP0AVREFL2 , bidir , X , 108 , 1 , Z ), " & --SP0AVREFL2 "170 (BC_2 , * , internal, 1 ), " & --SP0AVREFL2_CHK "171 (BC_7 , SP0AVREFH2 , bidir , X , 108 , 1 , Z ), " & --SP0AVREFH2 "172 (BC_2 , * , internal, 1 ), " & --SP0AVREFH2_CHK "173 (BC_2 , * , internal, 0 ), " & --SP0AD8 "174 (BC_2 , * , internal, 0 ), " & --SP0AD6 "175 (BC_2 , * , internal, 0 ), " & --SP0AD5 "176 (BC_2 , * , internal, 0 ), " & --SP0AD4 "177 (BC_2 , * , internal, 0 ), " & --SP0AD7 "178 (BC_7 , SP0AVREFH1 , bidir , X , 108 , 1 , Z ), " & --SP0AVREFH1 "179 (BC_2 , * , internal, 1 ), " & --SP0AVREFH1_CHK "180 (BC_7 , SP0AVREFL1 , bidir , X , 108 , 1 , Z ), " & --SP0AVREFL1 "181 (BC_2 , * , internal, 1 ), " & --SP0AVREFL1_CHK "182 (BC_2 , * , internal, 0 ), " & --SP0AD3 "183 (BC_2 , * , internal, 0 ), " & --SP0AEP0 "184 (BC_2 , * , internal, 0 ), " & --SP0AD2 "185 (BC_2 , * , internal, 0 ), " & --SP0AEP1 "186 (BC_2 , * , internal, 0 ), " & --SP0ASTBN0 "187 (BC_2 , * , internal, 0 ), " & --SP0ASTBP0 "188 (BC_2 , * , internal, 0 ), " & --SP0AD1 "189 (BC_2 , * , internal, 0 ), " & --SP0AEP2 "190 (BC_7 , SP0AVREFL0 , bidir , X , 108 , 1 , Z ), " & --SP0AVREFL0 "191 (BC_2 , * , internal, 1 ), " & --SP0AVREFL0_CHK "192 (BC_7 , SP0AVREFH0 , bidir , X , 108 , 1 , Z ), " & --SP0AVREFH0 "193 (BC_2 , * , internal, 1 ), " & --SP0AVREFH0_CHK "194 (BC_2 , * , internal, 0 ), " & --SP0AD0 "195 (BC_2 , * , control , 1 ), " & --SP1OEINT "196 (BC_7 , SP1SYNC , bidir , X , 195 , 1 , Z ), " & --SP1SYNC "197 (BC_4 , SP1PRES , input , X ), " & --SP1PRES "198 (BC_2 , * , internal, 0 ), " & --SP1AD13 "199 (BC_2 , * , internal, 0 ), " & --SP1AD14 "200 (BC_2 , * , internal, 0 ), " & --SP1AD12 "201 (BC_2 , * , internal, 0 ), " & --SP1AD15 "202 (BC_7 , SP1AVREFH3 , bidir , X , 108 , 1 , Z ), " & --SP1AVREFH3 "203 (BC_2 , * , internal, 1 ), " & --SP1AVREFH3_CHK "204 (BC_7 , SP1AVREFL3 , bidir , X , 108 , 1 , Z ), " & --SP1AVREFL3 "205 (BC_2 , * , internal, 1 ), " & --SP1AVREFL3_CHK "206 (BC_2 , * , internal, 0 ), " & --SP1AD11 "207 (BC_2 , * , internal, 0 ), " & --SP1ASSO "208 (BC_2 , * , internal, 0 ), " & --SP1AD10 "209 (BC_2 , * , internal, 0 ), " & --SP1ARSVD "210 (BC_2 , * , internal, 0 ), " & --SP1ASTBN1 "211 (BC_2 , * , internal, 0 ), " & --SP1ASTBP1 "212 (BC_2 , * , internal, 0 ), " & --SP1AD9 "213 (BC_2 , * , internal, 0 ), " & --SP1ALLC "214 (BC_7 , SP1AVREFL2 , bidir , X , 108 , 1 , Z ), " & --SP1AVREFL2 "215 (BC_2 , * , internal, 1 ), " & --SP1AVREFL2_CHK "216 (BC_7 , SP1AVREFH2 , bidir , X , 108 , 1 , Z ), " & --SP1AVREFH2 "217 (BC_2 , * , internal, 1 ), " & --SP1AVREFH2_CHK "218 (BC_2 , * , internal, 0 ), " & --SP1AD8 "219 (BC_2 , * , internal, 0 ), " & --SP1AD6 "220 (BC_2 , * , internal, 0 ), " & --SP1AD5 "221 (BC_2 , * , internal, 0 ), " & --SP1AD4 "222 (BC_2 , * , internal, 0 ), " & --SP1AD7 "223 (BC_7 , SP1AVREFH1 , bidir , X , 108 , 1 , Z ), " & --SP1AVREFH1 "224 (BC_2 , * , internal, 1 ), " & --SP1AVREFH1_CHK "225 (BC_7 , SP1AVREFL1 , bidir , X , 108 , 1 , Z ), " & --SP1AVREFL1 "226 (BC_2 , * , internal, 1 ), " & --SP1AVREFL1_CHK "227 (BC_2 , * , internal, 0 ), " & --SP1AD3 "228 (BC_2 , * , internal, 0 ), " & --SP1AEP0 "229 (BC_2 , * , internal, 0 ), " & --SP1AD2 "230 (BC_2 , * , internal, 0 ), " & --SP1AEP1 "231 (BC_2 , * , internal, 0 ), " & --SP1ASTBN0 "232 (BC_2 , * , internal, 0 ), " & --SP1ASTBP0 "233 (BC_2 , * , internal, 0 ), " & --SP1AD1 "234 (BC_2 , * , internal, 0 ), " & --SP1AEP2 "235 (BC_7 , SP1AVREFL0 , bidir , X , 108 , 1 , Z ), " & --SP1AVREFL0 "236 (BC_2 , * , internal, 1 ), " & --SP1AVREFL0_CHK "237 (BC_7 , SP1AVREFH0 , bidir , X , 108 , 1 , Z ), " & --SP1AVREFH0 "238 (BC_2 , * , internal, 1 ), " & --SP1AVREFH0_CHK "239 (BC_2 , * , internal, 0 ), " & --SP1AD0 "240 (BC_2 , * , internal, 0 ), " & --SP1BD13 "241 (BC_2 , * , internal, 0 ), " & --SP1BD14 "242 (BC_2 , * , internal, 0 ), " & --SP1BD12 "243 (BC_2 , * , internal, 0 ), " & --SP1BD15 "244 (BC_7 , SP1BVREFH3 , bidir , X , 108 , 1 , Z ), " & --SP1BVREFH3 "245 (BC_2 , * , internal, 1 ), " & --SP1BVREFH3_CHK "246 (BC_7 , SP1BVREFL3 , bidir , X , 108 , 1 , Z ), " & --SP1BVREFL3 "247 (BC_2 , * , internal, 1 ), " & --SP1BVREFL3_CHK "248 (BC_2 , * , internal, 0 ), " & --SP1BD11 "249 (BC_2 , * , internal, 0 ), " & --SP1BSSO "250 (BC_2 , * , internal, 0 ), " & --SP1BD10 "251 (BC_2 , * , internal, 0 ), " & --SP1BRSVD "252 (BC_2 , * , internal, 0 ), " & --SP1BSTBN1 "253 (BC_2 , * , internal, 0 ), " & --SP1BSTBP1 "254 (BC_2 , * , internal, 0 ), " & --SP1BD9 "255 (BC_2 , * , internal, 0 ), " & --SP1BLLC "256 (BC_7 , SP1BVREFL2 , bidir , X , 108 , 1 , Z ), " & --SP1BVREFL2 "257 (BC_2 , * , internal, 1 ), " & --SP1BVREFL2_CHK "258 (BC_7 , SP1BVREFH2 , bidir , X , 108 , 1 , Z ), " & --SP1BVREFH2 "259 (BC_2 , * , internal, 1 ), " & --SP1BVREFH2_CHK "260 (BC_2 , * , internal, 0 ), " & --SP1BD8 "261 (BC_2 , * , internal, 0 ), " & --SP1BD6 "262 (BC_2 , * , internal, 0 ), " & --SP1BD5 "263 (BC_2 , * , internal, 0 ), " & --SP1BD4 "264 (BC_2 , * , internal, 0 ), " & --SP1BD7 "265 (BC_7 , SP1BVREFH1 , bidir , X , 108 , 1 , Z ), " & --SP1BVREFH1 "266 (BC_2 , * , internal, 1 ), " & --SP1BVREFH1_CHK "267 (BC_7 , SP1BVREFL1 , bidir , X , 108 , 1 , Z ), " & --SP1BVREFL1 "268 (BC_2 , * , internal, 1 ), " & --SP1BVREFL1_CHK "269 (BC_2 , * , internal, 0 ), " & --SP1BD3 "270 (BC_2 , * , internal, 0 ), " & --SP1BEP0 "271 (BC_2 , * , internal, 0 ), " & --SP1BD2 "272 (BC_2 , * , internal, 0 ), " & --SP1BEP1 "273 (BC_2 , * , internal, 0 ), " & --SP1BSTBN0 "274 (BC_2 , * , internal, 0 ), " & --SP1BSTBP0 "275 (BC_2 , * , internal, 0 ), " & --SP1BD1 "276 (BC_2 , * , internal, 0 ), " & --SP1BEP2 "277 (BC_7 , SP1BVREFL0 , bidir , X , 108 , 1 , Z ), " & --SP1BVREFL0 "278 (BC_2 , * , internal, 1 ), " & --SP1BVREFL0_CHK "279 (BC_7 , SP1BVREFH0 , bidir , X , 108 , 1 , Z ), " & --SP1BVREFH0 "280 (BC_2 , * , internal, 1 ), " & --SP1BVREFH0_CHK "281 (BC_2 , * , internal, 0 ), " & --SP1BD0 "282 (BC_4 , RSVD1 , input , X ), "& "283 (BC_2 , * , internal , 0 ), " & "284 (BC_4 , RSVD63 , input , X ), "& "285 (BC_2 , * , internal , 0 ), " & "286 (BC_1 , CLK33 , output3 , X , 287 , 0 , Z ), "& "287 (BC_2 , * , control , 0 ), " & "288 (BC_1 , CLK66 , output3 , X , 289 , 0 , Z ), "& "289 (BC_2 , * , control , 0 ), " & "290 (BC_4 , RSVD56 , input , X ), "& "291 (BC_2 , * , internal , 0 ), " & "292 (BC_4 , RSVD55 , input , X ), "& "293 (BC_2 , * , internal , 0 ), " & "294 (BC_4 , RSVD0 , input , X ), "& "295 (BC_2 , * , internal , 0 ), " & "296 (BC_4 , DET , input , X ), "& "297 (BC_2 , * , internal , 0 ), " & "298 (BC_1 , RSVD54 , output3 , X , 299 , 0 , Z ), "& "299 (BC_2 , * , control , 0 ), " & "300 (BC_4 , LVHSTLODTEN , input , X ), "& "301 (BC_2 , * , internal , 0 ), " & "302 (BC_4 , RSVD39 , input , X ), "& "303 (BC_2 , * , internal , 0 ), " & "304 (BC_1 , RSVD53 , output3 , X , 305 , 0 , Z ), "& "305 (BC_2 , * , control , 0 ), " & "306 (BC_1 , RSVD52 , output3 , X , 307 , 0 , Z ), "& "307 (BC_2 , * , control , 0 ), " & "308 (BC_1 , RSVD51 , output3 , X , 309 , 0 , Z ), "& "309 (BC_2 , * , control , 0 ), "& "310 (BC_1 , RSVD50 , output3 , X , 311 , 0 , Z ), "& "311 (BC_2 , * , control , 0 ), " & "312 (BC_1 , RSVD49 , output3 , X , 313 , 0 , Z ), "& "313 (BC_2 , * , control , 0 ), " & "314 (BC_1 , RSVD48 , output3 , X , 315 , 0 , Z ), "& "315 (BC_2 , * , control , 0 ), " & "316 (BC_4 , HL0MODESEL , input , X ), "& "317 (BC_1 , HL0RQOUTNN , output3 , X , 318 , 0 , Z ), "& "318 (BC_2 , * , control, 0 ), " & "319 (BC_4 , HL0RQINNN , input , X ), "& "320 (BC_2 , * , internal , 0 ), " & "321 (BC_7 , HL0PDNN0 , bidir , X , 322 , 0 , Z ), "& "322 (BC_2 , * , control, 0 ), " & "323 (BC_7 , HL0PSTRBP , bidir , X , 324 , 0 , Z ), "& "324 (BC_2 , * , control, 0 ), " & "325 (BC_7 , HL0PSTRBN , bidir , X , 326 , 0 , Z ), "& "326 (BC_2 , * , control, 0 ), " & "327 (BC_7 , HL0PDNN5 , bidir , X , 328 , 0 , Z ), "& "328 (BC_2 , * , control, 0 ), " & "329 (BC_7 , HL0PDNN7 , bidir , X , 330 , 0 , Z ), "& "330 (BC_2 , * , control, 0 ), " & "331 (BC_7 , HL0PARNN , bidir , X , 332 , 0 , Z ), "& "332 (BC_2 , * , control, 0 ), " & "333 (BC_7 , HL0STOPNN , bidir , X , 334 , 0 , Z ), "& "334 (BC_2 , * , control, 0 ), " & "335 (BC_7 , HL0PDNN1 , bidir , X , 336 , 0 , Z ), "& "336 (BC_2 , * , control, 0 ), " & "337 (BC_7 , HL0PDNN2 , bidir , X , 338 , 0 , Z ), "& "338 (BC_2 , * , control, 0 ), " & "339 (BC_7 , HL0PDNN3 , bidir , X , 340 , 0 , Z ), "& "340 (BC_2 , * , control, 0 ), " & "341 (BC_7 , HL0PDNN4 , bidir , X , 342 , 0 , Z ), "& "342 (BC_2 , * , control, 0 ), " & "343 (BC_7 , HL0PDNN6 , bidir , X , 344 , 0 , Z ), "& "344 (BC_2 , * , control, 0 ), " & "345 (BC_1 , RSVD30 , output3 , X , 346 , 0 , Z ), "& "346 (BC_2 , * , control, 0 ), " & "347 (BC_7 , HL4RSVD0 , bidir , X , 348 , 0 , Z ), "& "348 (BC_2 , * , control, 0 ), " & "349 (BC_7 , HL4PSTRBS , bidir , X , 350 , 0 , Z ), "& "350 (BC_2 , * , control, 0 ), " & "351 (BC_7 , HL4PSTRBF , bidir , X , 352 , 0 , Z ), "& "352 (BC_2 , * , control, 0 ), " & "353 (BC_7 , HL4PD6 , bidir , X , 354 , 0 , Z ), "& "354 (BC_2 , * , control, 0 ), " & "355 (BC_7 , HL4PUSTRBS , bidir , X , 356 , 0 , Z ), "& "356 (BC_2 , * , control, 0 ), " & "357 (BC_7 , HL4PUSTRBF , bidir , X , 358 , 0 , Z ), "& "358 (BC_2 , * , control, 0 ), " & "359 (BC_7 , HL4PD14 , bidir , X , 360 , 0 , Z ), "& "360 (BC_2 , * , control, 0 ), " & "361 (BC_7 , HL4RSVD1 , bidir , X , 362 , 0 , Z ), "& "362 (BC_2 , * , control, 0 ), " & "363 (BC_1 , RSVD36 , output3 , X , 364 , 0 , Z ), "& "364 (BC_2 , * , control, 0 ), " & "365 (BC_7 , HL4STOP , bidir , X , 366 , 0 , Z ), "& "366 (BC_2 , * , control, 0 ), " & "367 (BC_7 , HL4PD15 , bidir , X , 368 , 0 , Z ), "& "368 (BC_2 , * , control, 0 ), " & "369 (BC_7 , HL4PD12 , bidir , X , 370 , 0 , Z ), "& "370 (BC_2 , * , control, 0 ), " & "371 (BC_7 , HL4PD10 , bidir , X , 372 , 0 , Z ), "& "372 (BC_2 , * , control, 0 ), " & "373 (BC_7 , HL4PD16 , bidir , X , 374 , 0 , Z ), "& "374 (BC_2 , * , control, 0 ), " & "375 (BC_7 , HL4PD7 , bidir , X , 376 , 0 , Z ), "& "376 (BC_2 , * , control, 0 ), " & "377 (BC_7 , HL4PD4 , bidir , X , 378 , 0 , Z ), "& "378 (BC_2 , * , control, 0 ), " & "379 (BC_7 , HL4PD2 , bidir , X , 380 , 0 , Z ), "& "380 (BC_2 , * , control, 0 ), " & "381 (BC_7 , HL4PD0 , bidir , X , 382 , 0 , Z ), "& "382 (BC_2 , * , control, 0 ), " & "383 (BC_7 , HL4PD1 , bidir , X , 384 , 0 , Z ), "& "384 (BC_2 , *, control, 0 ), " & "385 (BC_7 , HL4PD3 , bidir , X , 386 , 0 , Z ), "& "386 (BC_2 , * , control, 0 ), " & "387 (BC_7 , HL4PD5 , bidir , X , 388 , 0 , Z ), "& "388 (BC_2 , * , control, 0 ), " & "389 (BC_7 , HL4PD8 , bidir , X , 390 , 0 , Z ), "& "390 (BC_2 , * , control, 0 ), " & "391 (BC_7 , HL4PD9 , bidir , X , 392 , 0 , Z ), "& "392 (BC_2 , * , control, 0 ), " & "393 (BC_7 , HL4PD11 , bidir , X , 394 , 0 , Z ), "& "394 (BC_2 , * , control, 0 ), " & "395 (BC_7 , HL4PD13 , bidir , X , 396 , 0 , Z ), "& "396 (BC_2 , * , control, 0 ), " & "397 (BC_7 , HL4PD17 , bidir , X , 398 , 0 , Z ), "& "398 (BC_2 , * , control, 0 ), " & "399 (BC_4 , HL4RQIN , input , X ), "& "400 (BC_2 , * , internal , 0 ), " & "401 (BC_1 , HL4RQOUT , output3 , X , 402 , 0 , Z ), "& "402 (BC_2 , * , control, 0 ), " & "403 (BC_7 , RSVD34 , bidir , X , 404 , 0 , Z ), "& "404 (BC_2 , * , control, 0 ), " & "405 (BC_7 , HL3PSTRBS , bidir , X , 406 , 0 , Z ), "& "406 (BC_2 , * , control, 0 ), " & "407 (BC_7 , HL3PSTRBF , bidir , X , 408 , 0 , Z ), "& "408 (BC_2 , * , control, 0 ), " & "409 (BC_7 , HL3PD6 , bidir , X , 410 , 0 , Z ), "& "410 (BC_2 , * , control, 0 ), " & "411 (BC_7 , HL3PUSTRBS , bidir , X , 412 , 0 , Z ), "& "412 (BC_2 , * , control, 0 ), " & "413 (BC_7 , HL3PUSTRBF , bidir , X , 414 , 0 , Z ), "& "414 (BC_2 , * , control, 0 ), " & "415 (BC_7 , HL3PD14 , bidir , X , 416 , 0 , Z ), "& "416 (BC_2 , * , control, 0 ), " & "417 (BC_7 , RSVD35 , bidir , X , 418 , 0 , Z ), "& "418 (BC_2 , * , control, 0 ), " & "419 (BC_1 , RSVD33 , output3 , X , 420 , 0 , Z ), "& "420 (BC_2 , * , control, 0 ), " & "421 (BC_7 , HL3STOP , bidir , X , 422 , 0 , Z ), "& "422 (BC_2 , * , control, 0 ), " & "423 (BC_7 , HL3PD15 , bidir , X , 424 , 0 , Z ), "& "424 (BC_2 , * , control, 0 ), " & "425 (BC_7 , HL3PD12 , bidir , X , 426 , 0 , Z ), "& "426 (BC_2 , * , control, 0 ), " & "427 (BC_7 , HL3PD10 , bidir , X , 428 , 0 , Z ), "& "428 (BC_2 , * , control, 0 ), " & "429 (BC_7 , HL3PD16 , bidir , X , 430 , 0 , Z ), "& "430 (BC_2 , * , control, 0 ), " & "431 (BC_7 , HL3PD7 , bidir , X , 432 , 0 , Z ), "& "432 (BC_2 , * , control, 0 ), " & "433 (BC_7 , HL3PD4 , bidir , X , 434 , 0 , Z ), "& "434 (BC_2 , * , control, 0 ), " & "435 (BC_7 , HL3PD2 , bidir , X , 436 , 0 , Z ), "& "436 (BC_2 , * , control, 0 ), " & "437 (BC_7 , HL3PD0 , bidir , X , 438 , 0 , Z ), "& "438 (BC_2 , * , control, 0 ), " & "439 (BC_7 , HL3PD1 , bidir , X , 440 , 0 , Z ), "& "440 (BC_2 , * , control, 0 ), " & "441 (BC_7 , HL3PD3 , bidir , X , 442 , 0 , Z ), "& "442 (BC_2 , * , control, 0 ), " & "443 (BC_7 , HL3PD5 , bidir , X , 444 , 0 , Z ), "& "444 (BC_2 , * , control, 0 ), " & "445 (BC_7 , HL3PD8 , bidir , X , 446 , 0 , Z ), "& "446 (BC_2 , * , control, 0 ), " & "447 (BC_7 , HL3PD9 , bidir , X , 448 , 0 , Z ), "& "448 (BC_2 , * , control, 0 ), " & "449 (BC_7 , HL3PD11 , bidir , X , 450 , 0 , Z ), "& "450 (BC_2 , * , control, 0 ), " & "451 (BC_7 , HL3PD13 , bidir , X , 452 , 0 , Z ), "& "452 (BC_2 , * , control, 0 ), " & "453 (BC_7 , HL3PD17 , bidir , X , 454 , 0 , Z ), "& "454 (BC_2 , * , control, 0 ), " & "455 (BC_4 , HL3RQIN , input , X ), "& "456 (BC_2 , * , internal , 0 ), " & "457 (BC_1 , HL3RQOUT , output3 , X , 458 , 0 , Z ), "& "458 (BC_2 , * , control, 0 ), " & "459 (BC_7 , HL2RSVD0 , bidir , X , 460 , 0 , Z ), "& "460 (BC_2 , * , control, 0 ), " & "461 (BC_7 , HL2PSTRBS , bidir , X , 462 , 0 , Z ), "& "462 (BC_2 , * , control, 0 ), " & "463 (BC_7 , HL2PSTRBF , bidir , X , 464 , 0 , Z ), "& "464 (BC_2 , * , control, 0 ), " & "465 (BC_7 , HL2PD6 , bidir , X , 466 , 0 , Z ), "& "466 (BC_2 , * , control, 0 ), " & "467 (BC_7 , HL2PUSTRBS , bidir , X , 468 , 0 , Z ), "& "468 (BC_2 , * , control, 0 ), " & "469 (BC_7 , HL2PUSTRBF , bidir , X , 470 , 0 , Z ), "& "470 (BC_2 , * , control, 0 ), " & "471 (BC_7 , HL2PD14 , bidir , X , 472 , 0 , Z ), "& "472 (BC_2 , * , control, 0 ), " & "473 (BC_7 , HL2RSVD1 , bidir , X , 474 , 0 , Z ), "& "474 (BC_2 , * , control, 0 ), " & "475 (BC_1 , RSVD32 , output3 , X , 476 , 0 , Z ), "& "476 (BC_2 , * , control, 0 ), " & "477 (BC_7 , HL2STOP , bidir , X , 478 , 0 , Z ), "& "478 (BC_2 , * , control, 0 ), " & "479 (BC_7 , HL2PD15 , bidir , X , 480 , 0 , Z ), "& "480 (BC_2 , * , control, 0 ), " & "481 (BC_7 , HL2PD12 , bidir , X , 482 , 0 , Z ), "& "482 (BC_2 , * , control, 0 ), " & "483 (BC_7 , HL2PD10 , bidir , X , 484 , 0 , Z ), "& "484 (BC_2 , * , control, 0 ), " & "485 (BC_7 , HL2PD16 , bidir , X , 486 , 0 , Z ), "& "486 (BC_2 , * , control, 0 ), " & "487 (BC_7 , HL2PD7 , bidir , X , 488 , 0 , Z ), "& "488 (BC_2 , * , control, 0 ), " & "489 (BC_7 , HL2PD4 , bidir , X , 490 , 0 , Z ), "& "490 (BC_2 , * , control, 0 ), " & "491 (BC_7 , HL2PD2 , bidir , X , 492 , 0 , Z ), "& "492 (BC_2 , * , control, 0 ), " & "493 (BC_7 , HL2PD0 , bidir , X , 494 , 0 , Z ), "& "494 (BC_2 , * , control, 0 ), " & "495 (BC_7 , HL2PD1 , bidir , X , 496 , 0 , Z ), "& "496 (BC_2 , * , control, 0 ), " & "497 (BC_7 , HL2PD3 , bidir , X , 498 , 0 , Z ), "& "498 (BC_2 , * , control, 0 ), " & "499 (BC_7 , HL2PD5 , bidir , X , 500 , 0 , Z ), "& "500 (BC_2 , * , control, 0 ), " & "501 (BC_7 , HL2PD8 , bidir , X , 502 , 0 , Z ), "& "502 (BC_2 , * , control, 0 ), " & "503 (BC_7 , HL2PD9 , bidir , X , 504 , 0 , Z ), "& "504 (BC_2 , * , control, 0 ), " & "505 (BC_7 , HL2PD11 , bidir , X , 506 , 0 , Z ), "& "506 (BC_2 , * , control, 0 ), " & "507 (BC_7 , HL2PD13 , bidir , X , 508 , 0 , Z ), "& "508 (BC_2 , * , control, 0 ), " & "509 (BC_7 , HL2PD17 , bidir , X , 510 , 0 , Z ), "& "510 (BC_2 , * , control, 0 ), " & "511 (BC_4 , HL2RQIN , input , X ), "& "512 (BC_2 , * , internal , 0 ), " & "513 (BC_1 , HL2RQOUT , output3 , X , 514 , 0 , Z ), "& "514 (BC_2 , * , control, 0 ), " & "515 (BC_7 , HL1RSVD0 , bidir , X , 516 , 0 , Z ), "& "516 (BC_2 , * , control, 0 ), " & "517 (BC_7 , HL1PSTRBS , bidir , X , 518 , 0 , Z ), "& "518 (BC_2 , * , control, 0 ), " & "519 (BC_7 , HL1PSTRBF , bidir , X , 520 , 0 , Z ), "& "520 (BC_2 , * , control, 0 ), " & "521 (BC_7 , HL1PD6 , bidir , X , 522 , 0 , Z ), "& "522 (BC_2 , * , control, 0 ), " & "523 (BC_7 , HL1PUSTRBS , bidir , X , 524 , 0 , Z ), "& "524 (BC_2 , * , control, 0 ), " & "525 (BC_7 , HL1PUSTRBF , bidir , X , 526 , 0 , Z ), "& "526 (BC_2 , * , control, 0 ), " & "527 (BC_7 , HL1PD14 , bidir , X , 528 , 0 , Z ), "& "528 (BC_2 , * , control, 0 ), " & "529 (BC_7 , HL1RSVD1 , bidir , X , 530 , 0 , Z ), "& "530 (BC_2 , * , control, 0 ), " & "531 (BC_1 , RSVD31 , output3 , X , 532 , 0 , Z ), "& "532 (BC_2 , * , control, 0 ), " & "533 (BC_7 , HL1STOP , bidir , X , 534 , 0 , Z ), "& "534 (BC_2 , * , control, 0 ), " & "535 (BC_7 , HL1PD15 , bidir , X , 536 , 0 , Z ), "& "536 (BC_2 , * , control, 0 ), " & "537 (BC_7 , HL1PD12 , bidir , X , 538 , 0 , Z ), "& "538 (BC_2 , * , control, 0 ), " & "539 (BC_7 , HL1PD10 , bidir , X , 540 , 0 , Z ), "& "540 (BC_2 , * , control, 0 ), " & "541 (BC_7 , HL1PD16 , bidir , X , 542 , 0 , Z ), "& "542 (BC_2 , * , control, 0 ), " & "543 (BC_7 , HL1PD7 , bidir , X , 544 , 0 , Z ), "& "544 (BC_2 , * , control, 0 ), " & "545 (BC_7 , HL1PD4 , bidir , X , 546 , 0 , Z ), "& "546 (BC_2 , * , control, 0 ), " & "547 (BC_7 , HL1PD2 , bidir , X , 548 , 0 , Z ), "& "548 (BC_2 , * , control, 0 ), " & "549 (BC_7 , HL1PD0 , bidir , X , 550 , 0 , Z ), "& "550 (BC_2 , * , control, 0 ), " & "551 (BC_7 , HL1PD1 , bidir , X , 552 , 0 , Z ), "& "552 (BC_2 , * , control, 0 ), " & "553 (BC_7 , HL1PD3 , bidir , X , 554 , 0 , Z ), "& "554 (BC_2 , * , control, 0 ), " & "555 (BC_7 , HL1PD5 , bidir , X , 556 , 0 , Z ), "& "556 (BC_2 , * , control, 0 ), " & "557 (BC_7 , HL1PD8 , bidir , X , 558 , 0 , Z ), "& "558 (BC_2 , * , control, 0 ), " & "559 (BC_7 , HL1PD9 , bidir , X , 560 , 0 , Z ), "& "560 (BC_2 , * , control, 0 ), " & "561 (BC_7 , HL1PD11 , bidir , X , 562 , 0 , Z ), "& "562 (BC_2 , * , control, 0 ), " & "563 (BC_7 , HL1PD13 , bidir , X , 564 , 0 , Z ), "& "564 (BC_2 , * , control, 0 ), " & "565 (BC_7 , HL1PD17 , bidir , X , 566 , 0 , Z ), "& "566 (BC_2 , * , control, 0 ), " & "567 (BC_4 , HL1RQIN , input , X ), "& "568 (BC_2 , * , internal , 0 ), " & "569 (BC_1 , HL1RQOUT , output3 , X , 570 , 0 , Z ), "& "570 (BC_2 , *, control, 0 ) " ; ATTRIBUTE DESIGN_WARNING OF sioh: ENTITY IS "1. Two BSDL files define boundary scan for the SIOH. This BSDL file is" & " suitable for generating I/O tests excluding any testing of SP data." & " The other BSDL file is suitable for generating I/O tests excluding" & " explicit testing of SP Vref." & "2. Three types of cells are mentioned in these warnings: 'CHK', 'Vref'," & " and 'data'. A 'CHK' cell defines the operation of its associated" & " 'Vref' cell. 'Vref' cells define thresholds for 'data' receivers." & " 'data' cells include " & " SP{0/1}{A/B}{D[15:0]/EP[2:0]/LLC/SSO/RSVD/STB{P/N}[1:0]}. " & " 'CHK' cells include SP{0/1}{A/B}VREF{L/H}[3:0]CHK. " & " 'Vref' cells include SP{0/1}{A/B}VREF{L/H}[3:0]. " & " 'data' cells DO NOT include SP{0/1}{SYNC/PRES} in this context" & " because their thresholds are not defined by 'Vref'." & "3. Since SP Vref testing is enabled, SP data testing must be disabled." & " SP Vref's must be allowed to toggle 'to the rails' to facilitate" & " interconnect testing. This is accomplished by setting the internal" & " SP{0/1}{A/B}VREF{L/H}[3:0]CHK cells' safe values to '1'. A Vref at a" & " 'rail' provides a poor reference for a data receiver. Hence, SP data" & " testing is rendered inoperative. This is enforced by defining data" & " cells as internal cells. (The safe value of '0' posted to these data" & " cells is significant: it forces the output drivers to the '0' state." & " This choice was arbitrary... '1' would work as well, and would force" & " the output drivers to the '1' state.)" & "4. This scheme allows SP Vref testing by disabling the SP output-" & " enable of one agent and enabling the SP output-enable of its" & " opposing agent. The enabled SP will drive Vref 'to the rails'." & " Since the disabled SP will not 'fight' the enabled SP, no mid-state" & " will appear on Vref. Preventing mid-states on Vref will guarantee" & " sufficient noise margin between the 'railed' Vref and the internally" & " generated mid-state reference at the disabled SP's Vref boundary-" & " scan-only receiver." & "5. Test suites must not mix BSDL files. Scalability port patterns must" & " be generated using the same BSDL file 'flavor' for all components." & " The two 'flavors' are: a) the flavor of this file that excludes any" & " testing of SP data, and b) the flavor of the other file that" & " excludes explicit testing of SP Vref's." & "6. Suggestion: create two test suites: one that uses flavor a, and" & " another that uses flavor b (mentioned in warning 5). Since SP Vref" & " interconnections must be correct in order to test SP data, execute" & " suite 'a' first to root-cause any problems with SP Vref interconnect" & " before executing suite 'b'." & " " ; END sioh;