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Non-transparent PCI-to-PCI bridge technology for high-performance embedded and intelligent I/O applications
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Independent address spaces and asynchronous clocks deliver unparalleled application flexibility
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64-bit primary and secondary bus interfaces deliver high performance for data-intensive applications.
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Compliant with ACPI and PCI bus power management specifications
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Secondary bus arbitration support for up to nine bus master devices
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Evaluation Design Kit speeds time-to-market
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Fully compliant with Revision 2.3 of the PCI specification including delayed transactions
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Available in both 33 and 66 MHz variants
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