Spec Update: Celeron® and Pentium® Processor N- and J-series errata and clarifications. (v.11, Nov. 2015)
Specification Update: Specification errata and clarifications for the Intel® Celeron® and Pentium® processor N- and J-series. (v.11, Nov. 2015)
This document describes the x2APIC architecture, extended from the xAPIC architecture. The xAPIC was first implemented on Intel® Pentium® 4 processors, and extended the APIC architecture implemented on Intel® Pentium® processor and P6 processors.
Specification Update, 2009: Intel® 5400 Express Chipset memory controller hub (MCH), clarifications, changes, and documentation errata.
Specification updates for the Intel® 3200 and Intel® 3210 Chipset Memory Controller Hub (MCH), including device and documentation errata, specification clarification, and changes.