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Packet Processing is Enhanced with Software from Intel® DPDK

Improvements to multi-core architecture make packet processing viable on Intel® processors, resulting in high performance and reduced hardware costs.

Intel® Communications Chipset 89xx Series: Spec Update

Spec Update: Errata and changes on the Intel® Communications Chipset 89xx Series Datasheet for hardware and system developers. (v.5, May 2014)

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Intel® Xeon®/Core™/Pentium®/Celeron®, Comm Chipset 89xx: Diagram

Intel® Xeon®, Intel® Core™, Intel® Pentium®, and Intel® Celeron processors with Intel® Communications Chipset 89xx Series

Cave Creek EEPROM Download Instructions

Download Instructions: Download the EEPROM collateral for Cave Creek including the EEPROM image, image creation tool, and associated documentation.

Cave Creek Chipset Supported Ethernet PHY Devices: Note

App Note: Guide to selecting Ethernet Physical Layer (PHY) devices for Cave Creek Chipset designs supported by Crystal Forest. (v.001.1, June 2012)

Cave Creek Thermal Test Vehicle: Guide

User’s Guide: Describes and provides directions to use the Cave Creek Thermal Test Vehicle, including thermal metrology for heatsinks. (Dec. 2010)

Crystal Forest Platform: Debug Port Design Guide

Debug Port Design Guide: Crystal Forest platform best-known methods for debug port (XDP) design and XDP JTAG scan chain. (v.001.5, Aug. 2011)

Crystal Forest Gladden: Platform Design Guide

Platform Design Guide: Design guidelines for Crystal Forest Gladden components, including layout, routing, and power information. (v.2.2, Jan. 2014)

Crystal Forest Platform: Product Overview

Product Overview: Presents Crystal Forest platform products, benefits, communications roadmap, and deployment examples. (v.001, Aug. 2013)

Gladden, Sandy Bridge, and Ivy Bridge Error Correcting Code: Pres

Presentation: Error Correcting Code (ECC) introduction with methods and procedures for Gladden, Sandy Bridge, and Ivy Bridge processors. (Apr. 2012)