Intel® QuickPath Architecture

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Intel® QuickPath Architecture

White Paper: Intel® QuickPath Architecture

A new system architecture for unleashing the performance of future generations of Intel® multi-core microprocessors

Through its rapid “tick-tock” cadence for microprocessor innovation, Intel introduces a new microarchitecture or a new process technology (that includes enhanced microarchitecture features) nearly every year. The result is a cycle of industry-leading microprocessor performance. At the same time, the company also continuously looks for other ways to boost system infrastructure to support increased microprocessor performance. The latest example is Intel’s use of scalable shared memory, a memory access technique that has long been used in the high-end expandable server world to improve performance.

Starting in 2008 with its next generation microarchitectures—code named Nehalem and Tukwila—Intel is incorporating a scalable shared memory (also known as non-uniform shared access or NUMA). Intel’s new system architecture and platform technology will be called Intel® QuickPath Technology. It features new system architecture that integrates a memory controller into each microprocessor and connects processors and other components with a new high-speed interconnect. Previously announced under the code name Common System Interface, or CSI, the Intel QuickPath Interconnect is designed to unleash the performance of Intel’s future generations of multi-core processors, delivering the additional performance, bandwidth, and reliability required to support Intel’s next generation of dynamically scalable processors and platforms.

Read the full Intel® QuickPath Architecture White Paper.