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Atomic Read Modify Write Primitives for I/O Devices

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Atomic Read Modify Write Primitives for I/O Devices

White Paper: Atomic Read Modify Write Primitives

Abstract: New I/O usage models have emerged recently. There is a trend towards offloading compute intensive applications to specialized engines/accelerators. Many such applications today are in the high performance computing domain, examples of such are financial options modeling, seismic exploration, game physics, and bio-informatics. This paper illustrates the need for synchronization primitives for I/O accelerators to help these emerging usage models. It shows examples from real-world applications and the associated performance benefits of such primitives.

Many such applications today are in high performance computing domain for example, options modeling, seismic exploration, and game physics. These applications and associated libraries such as the Intel® Math Kernel Library (Intel® MKL) have traditionally been run in multi-threaded environments (over multiple cores/CPUs) and hence make extensive use of synchronization primitives such as semaphores, mutexes, and barriers. The challenges involved in porting existing applications to accelerators are reduced if existing algorithms and their associated interactions could be relocated to the accelerator(s). Because of the prevalence of synchronization primitives like semaphores, barriers, etc. in these algorithms, it is natural that these primitives be extended to the accelerators. In this paper, we examine some use cases for such primitives. In section two we define what Read Modify Write (RMW) primitives are. In section three we examine the usage of I/O device side RMWs for traditional (single-threaded) I/O devices and in section four we show their usage in multi-accelerator environments.

Read the full Atomic Read Modify Write Primitives for I/O Devices White Paper.