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8 C 7 6 5 4 3 82575 REFERENCE DESIGN (COPPER) 2 1 C B A PAGE INDEX 1 - TITLE PAGE 2 - FUNCTIONAL BLOCK DIAGRAM 3 - 82575 MDI, LEDS, CRYSTAL, SERDES, SFP, NCSI, SMBUS, EEPROM AND FLASH 4 - 82575 VCC3P3, VCC1P8, VCC1P0 AND VSS 5 - 82575 PCI EXPRESS, JTAG, AUX POWER, LAN DISABLE, MAIN POWER OK AND DEVICE OFF 6 - ANALOG FRONT END OPTION 1 - INTEGRATED MAGNETICS MODULE W/O USB 7 - ANALOG FRONT END OPTION 2 - DISCRETE MAGNETICS W/RJ45 REVISION HISTORY 1.0 -DOCUMENT RELEASE 1.1 -UPDATE COMMENTS 2.0 -ADD PU/PD ON NCSI (SHEET2) 1 - TITLE PAGE LAN ACCESS DIVISIONNUE 2111 N.E. 25th AVE24 HILLSBORO, OR 971 8 TITLE 7 82575 REF DESIGN - COPPER 6 5 SIZE B CODE DOCUMENT NUMBER 4 324963-002 3 2.0 REV 01/11 DATE 2 0 SHEET 1 B A 8 C SPI EEPROM SPI FLASH 7 6 5 4 FUNCTIONAL BLOCK DIAGRAM SERDES NOT SHOWN IN COPPER VERSION 3 82575 LAN CONTROLLER ETHERNET PORT A ETHERNET PORT B OPTION A - INTEGRATED MAGNETICS MODULE AFE OPTION B - DISCRETE MAGNETICS WITH RJ45 AFE 2 B A SMBUS/I2C/NCSI JTAG PCI-EXPRESS X4 +3.3V MAIN +3.3V AUX FOR REFERENCE POWER SUPPLY IMPLEMENTATION OPTIONS PLEASE REFER TO THE DESIGN GUIDE. POWER SUPPLY DELIVERY CUSTOMER IS RESPONSIBLE FOR DELIVERING A +3.3V SUPPLY THAT IS DERIVED FROM THE PLATFORM MAIN OR AUX SUPPLY RAILS. THE +1.8V AND +1.0V SUPPLY'S CAN BE DERIVED FROM THE +3.3V SUPPLY UTILIZING EITHER LINEAR OR SWITCHING REGULATOR TECHNOLOGIES. +3.3V LAN (3P3V_LAN) FOR SCHEMATIC +1.8V LAN (1P8V_LAN) FOR SCHEMATIC +1.0V LAN (1P0V_LAN) FOR SCHEMATIC 2 - FUNCTIONAL BLOCK DIAGRAM LAN ACCESS DIVISIONNUE 2111 N.E. 25th AVE24 HILLSBORO, OR 971 8 LEGEND SOLID LINE INDICATES THAT THE CONNECTIONS ARE SHOWN IN REFERENCE SCHEMATIC. DASHED LINE INDICATES THAT THE CONNECTIONS ARE NOT SHOWN IN REFERENCE SCHEMATIC. THESE CONNECTIONS ARE OWNED BY THE SYSTEM DESIGNER. TITLE 7 82575 REF DESIGN - COPPER 6 5 SIZE B CODE DOCUMENT NUMBER 4 324963-002 3 2.0 REV 01/11 DATE 2 1 C B A 1 SHEET 1 8 7 6 5 4 3 2 1 U1 3P3V_LAN J234 J2 K23 PULL UP RESISTOR 2 2 2 K24 VALUES SHOULD BE NO ADJUSTED BY SYSTEM R3 R5 R8 TOTAL TRACE LENGTH CONNECT A9 DESIGNER DEPENDING 10.0K 10.0K 10.0K SHOULD BE LESS THAN. 1 1 1 ON SYSTEM FOR 1 INCH. T243 ARCHITECTURE. COPPER T2 VERSION 2 1% R234 R2 R2 1.40K 1 A10 SER_RCOMP L22 N23 XTAL1 1 2 N24 XTAL2 TRACE LENGTHS SHOULD BE LESS THAN 0.75 R47 30 SMBALRT_N AD2011 INCHS. THESE ARE NOT SMBCLK AC22 DIFFERENTIAL SIGNALS. SMBD AD FOR DETAIL PLEASE REFER TO THE DESIGN GUIDE. Y1 25.000MHZ 1 2 SOFTWARE DEFINED IC 1 1 AC10 C1 27.0PF C2 3P3V_LAN 27.0PF PINS DEFAULT A132 A1 ON POWER UP 5% 5% AD10 2 2 AS INPUTS BUT R51 R4TP4 R6B15 CAN BE PROGRAMMED R50 2 2 B1766 AS OUTPUTS. B11 10.0K 10.0K 10.0K 10.0K A 1 1 MANAGEMENT INTERFACES Read the full D.

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