April 2003 Document Number: 252516-001 ® INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. ® ® The Intel 82801EB I/O Controller Hub 5 (ICH5) / Intel 82801ER I/O Controller Hub 5 R (ICH5R) chipset component may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. 2 2 I C is a two-wire communications bus/protocol developed by Philips. SMBus is a subset of the I C bus/protocol and was developed by Intel. 2 Implementations of the I C bus/protocol may require licenses from various entities, including Philips Electronics N.V. and North American Philips Corporation. Alert on LAN is a result of the Intel-IBM Advanced Manageability Alliance and a trademark of IBM. Intel, Intel SpeedStep and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. *Other names and brands may be claimed as the property of others. Copyright © 2002–2003, Intel Corporation 2 ® Intel 82801EB ICH5 / 82801ER ICH5R Datasheet Contents ® Intel ICH5/ICH5R Features � PCI Bus Interface — New: Supports PCI Revision 2.3 Specification at 33 MHz — 6 available PCI REQ/GNT pairs — One PCI REQ/GNT pair can be given higher arbitration priority (intended for external 1394 host controller) — Support for 44-bit addressing on PCI using DAC protocol � Integrated LAN Controller — New: Integrated ASF Management Controller — WfM 2.0 and IEEE 802.3 Compliant — LAN Connect Interface (LCI) — 10/100 Mbit/sec Ethernet Support � New: Integrated Serial ATA Host Controllers — Independent DMA operation on two ports. — Data transfer rates up to 1.5 Gb/s (150 MB/s). — RAID Level 0 Support (ICH5R Only) � Integrated IDE Controller — Supports “Native Mode” Register and Interrupts — Independent timing of up to 4 drives — Ultra ATA/100/66/33, BMIDE and PIO modes — Tri-state modes to enable swap bay � USB 2.0 — New: Includes 4 UHCI Host Controllers, increasing the number Read the full ® Intel 82801EB I/O Controller ® Hub 5 (ICH5) / Intel 82801ER I/O Controller Hub 5 R (ICH5R) Datasheet.