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USB 3.0 Internal Connector and Cable Specification

Internal cable interface for USB 3.0 in desktops, focuses on electrical and mechanical requirements of the connector and cable assembly.

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USB 3.0* Radio Frequency Interference on 2.4 GHz Devices

White Paper: Notice of certain USB 3.0* devices and cables causing radio frequency interference to wireless devices operating in the 2.4 GHz ISM band.

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PCI Express* (PCIe*) 3.0 Accelerator Features

Summary of PCI Express* capabilities for revision 3.0 accelerator features of the specification.

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PHY Interface for the PCI Express* Architecture: Revision .9

Specification: PHY interface for PCI Express* Architecture (PIPE), enables development of functionally equivalent PCI Express PHYs, for SATA 3.0.

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PCI Express* 3.0: Optimize Device Architecture on Intel Platforms

Presentation: PCI Express* protocol extensions summary, device architecture considerations, and software development.

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PCI Express* 3.0: Electrical Requirements for Designing ASICs

Presentation: PCI Express* Electrical Requirements for Designing ASICs on Intel Platforms covers background, Silicon TX, silicon RX test, and more.

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PHY Interface for the PCI Express* and USB SuperSpeed Architectures

Specification: PHY interface for PCI Express* and USB SuperSpeed*, enables development of functionally equivalent PCI Express and USB SuperSpeed PHYs.

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Case Study: Intel PCI and PCI Express*

Case Study: Intel, PCI Express* 3.0, make the PC platform more functional, performance-balanced and responsive for a variety of applications.

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PCI Express* to PCI-X* Bridge Architecture

White Paper describes the nature of PCI Express* to PCI-X* bridges as implemented in both client and server computing platforms.

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PCI Express* Architecture Power Management Rev 1.1

White Paper: Power management guidelines for PCI Express* links on Intel®-based Mobile platforms.

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