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Speed and Security by Design [75 K]
Resources and Tools for hardware development & design using Intel® products and technologies.

Resources and Tools for hardware development & design using Intel® products and technologies.

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Case Study: Intel PCI and PCI Express*
Case Study: Intel, PCI Express* 3.0, make the PC platform more functional, performance-balanced and responsive for a variety of applications.

Case Study: Intel, PCI Express* 3.0, make the PC platform more functional, performance-balanced and responsive for a variety of applications.

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MAC-PHY Interface Connector for the PCI Express* Architecture
White Paper: defines a PIPE connector interface to which MAC and PHY vendors can develop.

White Paper: defines a PIPE connector interface to which MAC and PHY vendors can develop.

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PCI Express* 3.0: Optimize Device Architecture on Intel Platforms
Presentation: PCI Express* protocol extensions summary, device architecture considerations, and software development.

Presentation: PCI Express* protocol extensions summary, device architecture considerations, and software development.

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Benefits of PCI Express* Architecture for Components and Systems
White Paper: PCI Express* Architecture, benefits of designing components and systems.

White Paper: PCI Express* Architecture, benefits of designing components and systems.

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Why PCI Express* Architecture for Graphics?
White Paper: Intel® Developer Network for PCI Express* Architecture, benefits and graphics usages.

White Paper: Intel® Developer Network for PCI Express* Architecture, benefits and graphics usages.

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Device Guidelines for PCI Express* Technology Extensions
Presentation: Intel Developer Forum 2010, implementation guidelines for PCI Express* technology extensions.

Presentation: Intel Developer Forum 2010, implementation guidelines for PCI Express* technology extensions.

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Universal Serial Bus 3.0 and 2.0 Specifications [59 K]
Technical details to understand USB 3.0 and 2.0 spec requirements, design compatible products, download developer-related PDFs, and more.

Technical details to understand USB 3.0 and 2.0 spec requirements, design compatible products, download developer-related PDFs, and more.

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Universal Serial Bus EHCI Compliance Testing Program [53 K]
The EHCI compliance testing evaluates the EHCI controller function of a USB 2.0 Host controller.

The EHCI compliance testing evaluates the EHCI controller function of a USB 2.0 Host controller.

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PHY Interface for the PCI Express* and USB SuperSpeed Architectures
Specification: PHY interface for PCI Express* and USB SuperSpeed*, enables development of functionally equivalent PCI Express and USB SuperSpeed PHYs.

Specification: PHY interface for PCI Express* and USB SuperSpeed*, enables development of functionally equivalent PCI Express and USB SuperSpeed PHYs.

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PCI Express* Technology, Enterprise Serial Innovation
Article: Hardware developer trends in enterprise interconnect technologies and how PCI Express* provides a common host connection attach point.

Article: Hardware developer trends in enterprise interconnect technologies and how PCI Express* provides a common host connection attach point.

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PHY Interface for the PCI Express* Architecture: Revision .9
Specification: PHY interface for PCI Express* Architecture (PIPE), enables development of functionally equivalent PCI Express PHYs, for SATA 3.0.

Specification: PHY interface for PCI Express* Architecture (PIPE), enables development of functionally equivalent PCI Express PHYs, for SATA 3.0.

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Intel® Core™2 Extreme Processor and Intel® Core™2 Quad Processors
Spec Update: Device and document errata and specification clarifications and changes for hardware system manufacturers and software developers.

Spec Update: Device and document errata and specification clarifications and changes for hardware system manufacturers and software developers.

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Intel® 82870P2 PCI/PCI-X 64-bit Hub 2: Thermal Design Guide
Thermal and Mechanical Design Guide: Intel® 82870P2 PCI/PCI-X 64-bit Hub 2.

Thermal and Mechanical Design Guide: Intel® 82870P2 PCI/PCI-X 64-bit Hub 2.

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Intel E7520 Memory Controller Hub: Datasheet
Datasheet: Intel® E7520 Memory Controller Hub covers signal, register, and functional descriptions, system map, and ballout and package specification.

Datasheet: Intel® E7520 Memory Controller Hub covers signal, register, and functional descriptions, system map, and ballout and package specification.

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Enhanced Host Controller Interface for USB 2.0: Specification
Specification: Describes the enhanced host controller interface for USB 2.0, including the system software/host controller hardware interface.

Specification: Describes the enhanced host controller interface for USB 2.0, including the system software/host controller hardware interface.

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Serial ATA Host Controller Interface Spec: Contributor Agreement
Written agreement of mutual promises and conditions between Intel and Contributor for contributing to the HCI Specification for Serial-ATA.

Written agreement of mutual promises and conditions between Intel and Contributor for contributing to the HCI Specification for Serial-ATA.

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Serial ATA AHCI: Specification Draft, Rev. 0.95
Defines functional behavior and Advanced Host Controller Interface software for moving data between system memory and serial ATA devices.

Defines functional behavior and Advanced Host Controller Interface software for moving data between system memory and serial ATA devices.

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Serial ATA AHCI: Specification, Rev. 1.0
Defines functional behavior and Advanced Host Controller Interface software for moving data between system memory and serial ATA devices.

Defines functional behavior and Advanced Host Controller Interface software for moving data between system memory and serial ATA devices.

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Serial ATA AHCI: Specification, Rev. 1.1
Defines functional behavior and Advanced Host Controller Interface software for moving data between system memory and serial ATA devices.

Defines functional behavior and Advanced Host Controller Interface software for moving data between system memory and serial ATA devices.

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Serial ATA AHCI: Specification, Rev. 1.2
Defines functional behavior and Advanced Host Controller Interface software for moving data between system memory and serial ATA devices.

Defines functional behavior and Advanced Host Controller Interface software for moving data between system memory and serial ATA devices.

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Serial ATA Frequently Asked Questions (FAQ) [78 K]
Serial ATA frequently asked questions from hardware developers concerning general I/O acceleration in storage systems.

Serial ATA frequently asked questions from hardware developers concerning general I/O acceleration in storage systems.

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EFI Human Interface Infrastructure Specification v0.9
Specification 0.92: defines core code for an implementation of the Human Interface Infrastructure of the Intel® Platform Innovation Framework for EFI.

Specification 0.92: defines core code for an implementation of the Human Interface Infrastructure of the Intel® Platform Innovation Framework for EFI.

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Energy-Efficient Platforms White Paper
White Paper: Designing devices using the new power management extensions for interconnects.

White Paper: Designing devices using the new power management extensions for interconnects.

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Improved Laptop Power Management [67 K]
For laptop power management, Intel works with hardware manufacturers, developers, and vendors to create a framework that optimizes energy usage.

For laptop power management, Intel works with hardware manufacturers, developers, and vendors to create a framework that optimizes energy usage.

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