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Non-Planar, Multi-Gate InGaAs QWFETs with High-K Gate Dielectric and Ultra Scaled Gate-to-Drain/Gate-to-Source Separation

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Non-Planar, Multi-Gate InGaAs QWFETs with High-K Gate Dielectric and Ultra Scaled Gate-to-Drain/Gate-to-Source Separation

In this work, non-planar, multi-gate InGaAs quantum well field effect transistors (QWFETs) with high-K gate dielectric and ultra-scaled gate-to-drain and gate-to-source separations (LSIDE) of 5nm are reported for the first time. The high-K gate dielectric formed on this non-planar device structure has the expected thin TOXE of 20.5Å with low JG, and high quality gate dielectric interface. The simplified S/D scheme is needed for the non-planar architecture while achieving significant reduction in parasitic resistance. Compared to the planar high-K InGaAs QWFET with similar TOXE, the non-planar, multi-gate InGaAs QWFET shows significantly improved electrostatics due to better gate control. The results of this work show that non-planar, multi-gate device architecture is an effective way to improve the scalability of III-V QWFETs for low power logic applications.

Introduction

Non-planar, multi-gate architectures have been investigated for improved electrostatics in Si MOSFETs [1], and most recently in III-V MOSFETs [2]. In this work, non-planar, multi-gate InGaAs QWFETs with high-K gate dielectric and ultra-scaled LSIDE of 5nm are reported. These non-planar, multi-gate QWFET devices have undoped InGaAs channel in the shape of a “fin” formed on top of large band gap InAlAs barrier, with simplified n++ InGaAs source/drain scheme. Compared to the planar high-K InGaAs QWFET with similar electrical oxide thickness (TOXE), the non-planar, multi-gate QWFET devices in this work show (i) more enhancement-mode threshold voltage (VT) and (ii) significantly improved electrostatics with reducing transistor gate length (LG) due to stronger gate control of the channel. In addition, the ultra-scaled LSIDE combined with the simplified n++ InGaAs source/drain (S/D) scheme will enable device footprint scaling.

Read the full Non-Planar, Multi-Gate InGaAs QWFETs with High-K Gate Dielectric and Ultra Scaled Gate-to-Drain/Gate-to-Source Separation Paper.