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Intel® Xeon® Processor 5500 Series Datasheet, Vol. 2

Intel® Xeon® Processor 5500 Series Datasheet, Vol. 2

The Intel® Xeon® Processor 5500 Series is the first generation DP server/workstation processor to implement key new technologies:
• Integrated Memory Controller
• Point-to-point link interface based on Intel® QuickPath Interconnect (Intel® QPI). Reference to this interface may sometimes be abbreviated with Intel QPI throughout this document.

The processor is optimized for performance with the power efficiencies of a low-power microarchitecture to enable smaller, quieter systems.

This document provides register documentation and functional description of major functional areas of the processor non-core design such as the memory controller and Intel QPI logic, and additional features pertinent to implementation and operation of the processor.

The Intel Xeon Processor 5500 Series are multi-core processors, based on 45 nm process technology. Processor features vary by SKU and include up to two Intel QuickPath Interconnect point-to-point links capable of up to 6.4 GT/s, up to 8 MB of shared cache, and an integrated memory controller. The processors support all the existing Streaming SIMD Extensions 2 (SSE2), Streaming SIMD Extensions 3 (SSE3), and Streaming SIMD Extensions 4 (SSE4). The processor supports several advanced technologies: Execute Disable Bit, Intel® 64 Technology, Enhanced Intel SpeedStep® Technology, Intel® Virtualization Technology (Intel® VT), and Intel® Hyper-Threading Technology.

Read the full Intel® Xeon® Processor 5500 Series Datasheet, Vol. 2.

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