Vira Ragavassamy presents practical tips and steps for signal integrity simulation on a DDR interface, including new memory controller features.
Checking guide presents best practices for board layout review, including review of power delivery, system clocks, and interfaces. (v.1, Dec. 2009)
White Paper: Checking guide presents best practices for board layout review. (v.1, Dec. 2009)
Vira Ragavassamy presents a signal integrity introduction and detailed steps for signal integrity simulation on Intel® architecture. (Dec. 2008)
White Paper: Introduces alternative AHCI register and user interface to perform setup for the SATA motherboard signal quality test. (v.1, Dec. 2009)
White Paper: Demonstrates design and performance capabilities for IP Security in Linux* using an Intel® AES New Instructions and Galois Counter Mode* algorithm mode combination on Intel® microarchitecture. (v.1, Dec. 2009)