Guide: Describes the real-time instruction trace programming interface with examples of common usage models, operational considerations, and more.
Guide: Describes the programming interface of the real-time instruction trace with examples of common usage models, operational considerations for sleep states and security initializations, background, and related processor mechanisms.
Case Study: SGCC’s power grid simulation capacity, scalability, and performance improve with an integrated Intel® architecture-based solution.
Case Study: State Grid Corporation of China (SGCC) increases their Advanced Digital Power System Simulator* capacity, scalability, and performance with an integrated hardware and software solution based on Intel® architecture.
App Note: Covers home health gateway design challenges, starting with off-the-shelf Avalue Technology platform to decrease required design time.
Product Datasheet: Arch Rock PhyNet Server* manages and aggregates interconnected IP-based wireless sensor networks using a common web services architecture, featuring an intuitive web interface for convenient administration.
Student Wang Haoran rekindles interest in the ancient art of shadow puppetry by blending tradition and technology for new generations.
Student Wang Haoran of Xidian University rekindles interest in the ancient art of shadow puppetry by blending modern technology and tradition to re-create a puppeteer’s complex movements for new generations.Full View >
Update to the Intel® 64 and IA-32 Architectures Software Developer’s Manual, with device and documentation errata, spec clarifications, and changes.
Update to the specifications contained in the Intel® 64 and IA-32 Architectures Software Developer’s Manual, with device and documentation errata, specification clarifications, and changes for hardware system manufacturers and software developers.