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HyperScan Helps Deliver 36 Gbps Deep Packet Inspection Throughput

Solution brief: HyperScan pattern matching software scales with Intel® architecture to optimize deep packet inspection performance and throughput.

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Chimera—Expression Matching Engine with Full PCRE Semantics

White Paper: Chimera combines HyperScan with other matchers to deliver block mode scanning with full PCRE semantics. (v.1, Oct. 2013)

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Simplify Virtualized Network Elements in Telecom

White Paper: Tail-f* provides an abstraction layer between operations support systems and ISV software-based network elements. (v.3, August 2013)

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Flexible Workload Acceleration on Intel® Architecture

White Paper: Intel® QuickAssist Technology overview and implementation scenarios for accelerating flexible workloads. (v.1, Feb. 2012)

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Intel and Ericsson Team Up to Streamline M2M Platform Design

Solution Brief covers Intel and Ericsson reference design features for standards-based technologies for machine-to-machine platforms.

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SDN Orchestration Layer Implementation Considerations

White Paper: How providing the SDN orchestration layer with more info on node platform capabilities can lead to greater virtual machine performance.

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Boosting LTE App Performance with Intel® System Studio: Case Study

Case Study: Intel® System Studio optimizes the LTE software stack for high performance, rapid development, and design simplification. (v.1, Apr. 2014)

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Fast SHA256 Code for Intel® Architecture: Code Release

Code Release: Use four optimized functions to compute SHA256 hash, improving performance on Intel® architecture for any length of data buffers.

Fast SHA512 Code for Intel® Processors: Code Release

Code Release: Use Fast SHA512 code optimized for various Intel® processors, delivering high performance over a range of data buffer sizes.

Open Standards for Open Source Software

Describes the Intel® Open Network Platform initiatives and how it advances network functions virtualization and software-defined networking solutions.