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Intel® Scalable System Architecture Specification

This specification for high performance computing systems enables a high degree of commonality and interoperability between systems.

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Intel® Scalable System Framework Reference Design

This Intel® SSF Reference Design includes Intel® Xeon® processor E5-2600 v4 product family and Intel® OPA, and uses the OpenHPC software stack.

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Jefferson Lab Improves Application Performance Case Study

Jefferson Lab improves scientific application performance for faster results with Intel® Xeon Phi™ coprocessor-based Seneca servers and Linux* OS.

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EFI Processor Subclass Specification v0.9

Defines core code for an implementation of the processor data hub subclass of the Intel® Platform Innovation Framework for EFI.

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EFI Data Hub Specification v0.9

Code and services for data hub in Intel® Platform Innovation Framework for EFI. Hub is a volatile database intended as focus for manageability data.

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EFI Data Hub Subclass Design Guide v0.9

Defines core code for an implementation of the data hub subclass of the Intel® Platform Innovation Framework for EFI.

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EFI Driver Execution Environment Core Interface Spec v0.9

Specification: core code and services to implement the Driver Execution Environment (DXE) phase of the Intel® Platform Innovation Framework for EFI.

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EFI Driver Execution Environment Core Interface Spec v0.91

Specification, 0.91: core code and services to implement the Driver Execution Environment phase of the Intel® Platform Innovation Framework for EFI.

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EFI Firmware File System Specification v0.9

Defines core code for an implementation of the Firmware File System of the Intel® Platform Innovation Framework for EFI.

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EFI Firmware Volume Specification v0.9

Volume Specification for the Intel® Platform Innovation Framework for EFI Firmware provides code definitions, framework image format, and more.

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