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Low Power System Design with Memory Down

White Paper: Design a low power, scalable embedded system with memory down on the PCB instead of traditional memory connectors. (v.001, Aug. 2009)

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Migration to New Display Technologies on Intel® Embedded Platforms

White Paper: Describes new display technologies of Intel® scalable and low-power platforms (v.1, Feb. 2013).

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Interfacing I²C* Devices to SMBus Controller

White Paper: Determine how to interface I²C* devices and Intel® I/O Controller Hub SMBus controller with analysis guidelines. (Jan. 2009)

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EFI Human Interface Infrastructure Specification v0.92

Defines core code for an implementation of the Human Interface Infrastructure of the Intel® Platform Innovation Framework for EFI.

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EFI System Management Mode Core Interface Spec (SMM CIS) v0.9

Defines the core code and services required for implementation of the System Management Mode of the Intel® Platform Innovation Framework for EFI.

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EFI Boot Script Specification v0.91

Boot Script Specification update for the Intel® Platform Innovation Framework for EFI.

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EFI Cache Subclass Specification v0.9

Defines core code for an implementation of the cache data hub subclass of the Intel® Platform Innovation Framework for EFI.

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EFI Capsule Specification v0.9

Describes data process passed from runtime applications to reboot phases in implementation of the Intel® Platform Innovation Framework for EFI.

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Intel® Platform Innovation Framework for EFI—CSM Spec, Rev. 97

Revision 0.97: high-level design of the Compatibility Support Module code to implement the Intel® Platform Innovation Framework for EFI.

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Intel® Platform Innovation Framework for UEFI—CSM Spec, Rev. 98

Design of the Compatibility Support Module code for implementing the Intel® Platform Innovation Framework for UEFI.

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