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Configure PCI-Express* Lanes for Simultaneous Applications

Configurations for PCI-Express* lanes on Intel® Core™ i7 processors, providing an interface for multiple simultaneous applications. (v.001, Dec. 2010)

Embedded Controller Usage in Low-Power Embedded Designs

Provides overview of embedded controller usage to understand form, fit, function, and use in a low-power reference design. (v.1, Sep. 2011)

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I²C Interface to SMBus Controller - Intel White Paper

White Paper: Determine how to interface I²C* devices and Intel® I/O Controller Hub SMBus controller with analysis guidelines. (Jan. 2009)

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Low Power System Design with Memory Down

White Paper: Design a low power, scalable embedded system with memory down on the PCB instead of traditional memory connectors. (v.1, Aug. 2009)

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EFI Processor Subclass Specification v0.9

Defines core code for an implementation of the processor data hub subclass of the Intel® Platform Innovation Framework for EFI.

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EFI Firmware Volume Specification v0.9

Volume Specification for the Intel® Platform Innovation Framework for EFI Firmware provides code definitions, framework image format, and more.

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EFI Firmware Volume Block Specification v0.9

Defines firmware volume, volume block protocol implementation.

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EFI Driver Execution Environment Core Interface Spec v0.9

Specification: core code and services to implement the Driver Execution Environment (DXE) phase of the Intel® Platform Innovation Framework for EFI.

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EFI Driver Execution Environment Core Interface Spec v0.91

Specification, 0.91: core code and services to implement the Driver Execution Environment phase of the Intel® Platform Innovation Framework for EFI.

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EFI Firmware File System Specification v0.9

Defines core code for an implementation of the Firmware File System of the Intel® Platform Innovation Framework for EFI.

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