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Fast Cryptographic Computation Via Function Stitching

White Paper: Pair function stitching together in fine-grains to enable more cryptographic computation and performance gains on Intel® processors.

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Processing Multiple Buffers in Parallel for Performance

White Paper: How processing multiple independent data buffers in parallel dramatically increases performance without SIMD on Intel® processors.

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High-Performance Storage Encryption on Intel® Architecture

White Paper: Describes the performance benefits of optimizing storage encryption on Intel® architecture. (v.1, Aug. 2010)

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Haswell Cryptographic Performance

White Paper: Discusses Haswell Intel® Core™ processor family features for cryptographic algorithm implementations such as Secure Hash Algorithm.

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Novel Hashing Method Suitable for Lookup Functions: Paper

Describes a hashing method suitable for lookup functions and how to compute a high-quality 64-bit hash digest on Intel® processors. (v.1, Feb. 2012)

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Intel® Advanced Encryption Standard Instructions: Article

Intel’s Jeffrey Rott presents an in-depth look at Intel® Advanced Encryption Standard New Instructions and performance and security improvements.

Boosting AES Algorithm Performance for Superior Encryption

White Paper: Running the AES algorithm with Intel® technology improves encryption performance of serial and parallel modes of operation. (April 2010)

High Performance DEFLATE Decompression on Intel® Architecture

White Paper: Performance characteristics of an optimized implementation of DEFLATE decompression on Intel® processors. (v.1, Nov. 2010)

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Improving OpenSSL* Performance

White Paper: Results of OpenSSL* performance measurements with highly optimized cryptographic implementations on IA. (v.1, Oct. 2011)

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Multi-buffer IPsec Implementation on Intel® Processors White Paper

White Paper: Describes highly-optimized implementations on the Intel® Multi-Buffer Crypto for IPsec. (v.1, Dec. 2012)

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