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Intel® Products

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Intel® Itanium® ProcessorsSoftware Developers

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EFI CPU I/O Protocol Specification v0.9

Covers core code and services required for an implementation of the CPU I/O Protocol of the Intel® Platform Innovation Framework for EFI.

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EFI CPU I/O Protocol Specification v0.9

This specification defines the core code and services that are required for an implementation of the CPU I/O Protocol of the Intel® Platform Innovation Framework for EFI (hereafter referred to as the "Framework").

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EFI Cache Subclass Specification v0.9

Defines core code for an implementation of the cache data hub subclass of the Intel® Platform Innovation Framework for EFI.

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EFI Cache Subclass Specification v0.9

This specification defines the core code that is required for an implementation of the cache data hub subclass of the Intel® Platform Innovation Framework for EFI (hereafter referred to as the "Framework").

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EFI Human Interface Infrastructure Specification v0.9

Human Interface Infrastructure Specification describes how the Intel® Platform Innovation Framework for EFI manages user input.

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EFI Human Interface Infrastructure Specification v0.9

Describes how the Intel® Platform Innovation Framework for EFI manages user input for string and font management, driver execution environment, boot device selection, and internal and external representations.

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EFI Human Interface Infrastructure Specification v0.92

Defines core code for an implementation of the Human Interface Infrastructure of the Intel® Platform Innovation Framework for EFI.

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EFI Human Interface Infrastructure Specification v0.92

This specification defines the core code and services that are required for an implementation of the Human Interface Infrastructure (HII) of the Intel® Platform Innovation Framework for EFI.

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EFI System Management Mode Core Interface Spec (SMM CIS) v0.9

Defines the core code and services required for implementation of the System Management Mode of the Intel® Platform Innovation Framework for EFI.

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EFI System Management Mode Core Interface Spec (SMM CIS) v0.9

This specification defines the core code and services that are required for an implementation of the System Management Mode (SMM) phase of the Intel® Platform Innovation Framework for EFI (hereafter referred to as the “Framework”).

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Intel® 7500 Scalable Memory Buffer Specification Update

This document contains updates to Intel® 7500 Scalable Memory Buffer. It is a compilation of device and documentation clarifications and changes.

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Intel® 7500 Scalable Memory Buffer Specification Update

This document contains updates to Intel® 7500 Scalable Memory Buffer. It is a compilation of device and documentation clarifications and changes.

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EFI Human Interface Infrastructure Specification v0.91

Defines core code for implementation of Human Interface Infrastructure of the Intel® Platform Innovation Framework for EFI.

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EFI Human Interface Infrastructure Specification v0.91

This specification defines the core code and services that are required for an implementation of the Human Interface Infrastructure (HII) of the Intel® Platform Innovation Framework for EFI.

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EFI Pre-EFI Initialization Core Interface Specification v0.9

Defines core code for an implementation of the Pre-EFI Initialization phase of the Intel® Platform Innovation Framework for EFI.

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EFI Pre-EFI Initialization Core Interface Specification v0.9

This specification defines the core code and services that are required for an implementation of the Pre-EFI Initialization (PEI) phase of the Intel® Platform Innovation Framework for EFI.

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