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Intel® 6 Series/Intel® C200 Series Chipsets: Spec Update NDA

Spec Update: Device and documentation errata, and changes for the Intel® 6 Series and Intel® C200 Series Chipsets Spec Rev. 2.1. (v.22, Jun. 2016)

Stereo 3D for Intel® Core™ processors with HD Graphics: Paper

Stereoscopic 3D setup for Intel® Core™ i3/i5/i7 processors with Intel® HD Graphics with Blu-Ray* stereo 3D details. (v.0.81, Sep. 2010)

Intel® Management Engine for Intel® 6/C200 Series Chipset: Guide

Compliance Guide: Intel® 6/C200 Series Chipset Intel® Management Engine firmware compliancy requirements, methodology, and tools. (v.001.4, Dec. 2010)

Intel® ME and Huron River Embedded Controller Interaction: Spec

Product Spec: Intel® Management Engine and embedded controller interaction and communication protocol for Huron River system. (v.000.7, Apr. 2010)

2nd Generation Intel® Core™ Processor Mobile Family: Calculator

Trace Length Calculator: Ensures trace lengths meet recommendations for the 2nd generation Intel® Core™ processor mobile family (v.002, Mar. 2011)

Huron River Platform: Design Guide

Design Guide: Interface, signal, and thermal guidelines for the Huron River platform, based on 2nd gen Intel® Core™ processor family. (v.2, Mar. 2011)

Huron River Platform: Design Guide Addendum

Design Guide Addendum: Updated recommendations on ECC memory routing guidelines for the Huron River platform. (v.2.1, Mar. 2012)

Huron River and ECC Platform: Design Presentation

Design Presentation: Key features, interfaces, I/O, clocking, signal, and CRBs for the Huron River and ECC platform. (v.001, Apr. 2010)

Huron River Platform Design Without Embedded Controller: App Note

Application Note: Investigates possible Huron River platform work around for low power board design without an embedded controller. (v.001, Apr. 2010)

Huron River Pmax, Tsys, Platform Limiters for Mobile Sandy Bridge

White Paper: Huron River platform general guide to obtain Pmax, Tsys, and Platform Limiters for thermal evaluations. (v.000.5, May 2010)