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Reference Manual: Intel® High Definition Audio

Intel® I/O Controller Hub 7 (Intel® ICH7)/ Intel® High Definition Audio (Intel® HD Audio)/ AC’97: Programmer’s Reference Manual (PRM) For the Intel® 82801GB ICH7 and 82801GR ICH7R I/O Controller Hubs

The Intel® HD Audio controller resides in PCI Device 27, Function 0 on bus 0. This function contains a set of DMA engines that are used move samples of digitally encoded data between system memory and external codecs.

Note: All registers in this function (including memory-mapped registers) must be addressable in byte, word, and DWord quantities. The software must always make register accesses on natural boundaries (i.e. DWord accesses must be on DWord boundaries; word accesses on word boundaries, etc.) In addition, the memory-mapped register space must not be accessed with the LOCK semantic exclusive-access mechanism. If software attempts exclusive-access mechanisms to the Intel® HD Audio memory-mapped space, the results are undefined.

Note: Users interested in providing feedback on the Intel® HD Audio specification or planning to implement the Intel® High Definition Audio specification into a future product will need to execute the Intel® High Definition Audio Specification Developer’s Agreement. For more information, contact

Read the full Intel® High Definition Audio Reference Manual.