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Debugging Machine Check Exceptions on Embedded Intel® Architecture

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Debugging Machine Check Exceptions on Embedded Intel® Architecture

Embedded systems need to be able to detect, recover from, and report errors. This is a critical feature not only during debugging but also for quality control after product manufacturing has begun. The importance of advanced error handling capabilities is often magnified for embedded systems because many are deployed in a large number of units, dispersed widely, and are running mission-critical type applications. Further, the embedded systems present a unique challenge due to their diverse form factors, vastly different feature sets, and special usage models.

Intel® processors include Machine Check Architecture Recovery, which has built-in capability to detect, report, and attempt recovery from the system errors the CPU observes. As Intel® architecture gets increasingly popular in the embedded space, the value and significance of machine check exceptions grows. Embedded products are often running critical applications non-stop for extended periods of time where unexpected system resets may present significant impact. Many times, machine check exceptions are the only available clue that the customer has during system failures and they provide a starting point for debugging.

This application note is intended to provide recommendations on how to debug machine check exceptions on embedded Intel® architecture platforms. It also goes over the Machine Check Architecture Recovery and uses the Intel® Core™ Duo processor and Intel® Core™2 Duo processor as examples. However, the information and methodology is generic to all newer Intel® architecture processors.

This document presents a step-by-step approach to debugging machine check exceptions, understanding their causes, and reaching timely resolution of the errors on embedded Intel® architecture platforms.

Read the full Debugging Machine Check Exceptions on Embedded Intel® Architecture White Paper.