Intel® Embedded Media and Graphics Driver (Intel® EMGD) FAQ

1.  What is the minimum standard active resolution supported by the integrated LVDS display controller on the Intel® System Controller Hub US15W chipset and Intel® EMGD?

One needs to be sure the chipset’s design specifications are not violated. The minimum standard active resolution is therefore 640 x 480 @ 50Hz vertical refresh which equates to ~20MHz pixel clock. It may be possible to pad the horizontal and vertical blanking and adjust the refresh rate higher to get a lower resolution at the minimum 20 MHz pixel clock, but that is something that needs to be explored with the panel manufacturer.

2.  What is the minimum and maximum custom active resolution supported by the integrated LVDS display controller on Intel® EMGD?

Theoretically, any timing mode that yields a pixel clock frequency between 20 MHz and 112 MHz mentioned by the respective chipset/processor design spec could be supported by Intel® EMGD. To determine if a particular timing mode can be supported, use the following formula as an example to determine the pixel clock frequency and then determine if it is between 20 MHz and 112 MHz:

Using 720 x 480 @ 60 Hz as an example:

pixel clock frequency = HTOTAL * VTOTAL * Vertical Refresh Rate / 1000000

HACTIVE = 720 pixels / line

HBLANK_BACK PORCH = 10 pixels / line

HBLANK_FRONT PORCH = 128 pixels / line

HTOTAL = HACTIVE + HBLANK_BACK PORCH + HBLANK_FRONT PORCH

HTOTAL = 720 + 10 + 128 = 858 pixels / line

VACTIVE = 480 lines / frame

VBLANK_BACK PORCH = 19 lines / frame

VBLANK_FRONT PORCH = 26 lines / frame

VTOTAL = VACTIVE + VBLANK_BACK PORCH + VBLANK_FRONT PORCH

VTOTAL = 480 + 19 + 26 = 525 lines / frame

pixel clock frequency = HTOTAL * VTOTAL * Vertical Refresh Rate / 1000000

pixel clock frequency = 858 pixels / line * 525 lines / frame * 60 Hz / 1000000

pixel clock frequency = 27.027 MHz

pixel clock frequency > 20 MHz so 720 x 480 @ 60 Hz can be supported by Intel® EMGD via the Configuration EDitor (CED) application.