Embedded Multi-die Interconnect Bridge

A breakthrough in advanced packaging technology

An Elegant Interconnect for a More Civilized Age

Embedded Multi-die Interconnect Bridge (EMIB) is an elegant and cost-effective approach to in-package high density interconnect of heterogeneous chips.  The industry refers to this application as 2.5D package integration. Instead of using a large silicon interposer typically found in other 2.5D approaches, EMIB uses a very small bridge die, with multiple routing layers.  This bridge die is embedded as part of our substrate fabrication process.

Connecting Heterogeneous Die

Modern packaging techniques call for a maximum number of die-to-die connections. Traditional solutions to this challenge are categorized as 2.5D solutions, utilizing a silicon interposer and Through Silicon Vias (TSVs) to connect die at so-called silicon interconnect speed in a minimal footprint. The result is increasingly complex layouts and manufacturing techniques that delay tape-outs and depress yield rates.

Embedding an Interconnect Bridge

We sought a solution that is practical to design, reliable across any die, and simple to implement in a design. The result is the Embedded Multi-die Interconnect Bridge, affectionately abbreviated to EMIB.  There can be many embedded bridges in a single substrate, providing extremely high I/O and well controlled electrical interconnect paths between multiple die, as needed.  Because the chips do not have to be connected to the package through a silicon interposer with TSVs, there is nothing to potentially degrade their performance. We use micro-bumps for high density signals, and coarser pitch, standard flip chip bumps for direct power and ground connections from chip to package.

The cross-section shows two die that have been assembled to a package with micro-bumps providing die-to-die connections through a bridge chip.

Simple and Scalable

No Additional Die Size Constraints: The silicon interposer in a typical 2.5D package is a piece of silicon larger-than-all interconnecting die. In contrast, the silicon bridge is a small piece of silicon embedded only under the edges of two interconnecting die. This allows for most size die to be attached in multiple dimensions, eliminating additional physical constraints on heterogeneous die attachment within the theoretical limits.

The image shows a difficult yet desirable layout. The industry standard 2.5D solution cannot accommodate this, as the silicon interposer cannot be produced large enough to connect all the die. Yet EMIB allows for the flexibility in this die placement, allowing scaling in both dimensions.

Yields in Normal Package Range with No TSVs

The result is a solution that is straightforward to design and manufacture without depressing yields beyond normal package yield ranges. Utilizing bridge silicon eliminates the need for:

  1. Through Silicon Via formation and fill
  2. Backside interposer processes to reveal the Through Silicon Vias

Since there is no silicon interposer, die are assembled directly to the package using standard flip chip assembly processes.

Altera is enabling next-generation platforms with 3D system-in-package technology built with Intel’s EMIB.

Read the Altera whitepaper

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