Introduction and Scope
The Intel® 82546GB/EB and Intel® 82545GM/EM Gigabit Ethernet controllers use an EEPROM device for storing product configuration information. The EEPROM is divided into four general regions:
• Hardware accessed
– loaded by the Ethernet controller after power-up, PCI Reset deassertion, D3->D0 transition, or software commanded EEPROM reset (CTRL_EXT.EE_RST).
>• ASF accessed
– loaded by the Ethernet controller in ASF mode after power-up, ASF Soft Reset (ASF FRC_RST), or software commanded ASF EEPROM read (ASF FRC_EELD).
• Software accessed
– used by software only. The meaning of these registers as listed here is a convention for the software only and is ignored by the Ethernet controller.
• External BMC (TCO) accessed
– loaded by external BMC (TCO) from SMBus in pass-through mode after power up.
Several words of the EEPROM are accessed automatically by the Ethernet controller after reset to provide pre-boot configuration data before it is accessed by host software. The remainder of the stored information is available to software for storing the MAC address, serial numbers, and additional configuration information.
Intel has a software utility called EEUPDATE that can be used to program EEPROM images in development or production line environments. To obtain a copy of this program, contact your Intel representative.