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Technical Paper: Next generation Intel® Itanium® processor implemented in 32-nm CMOS has 3.1 billion transistors, and delivers increased performance.
Intel® E8870 Chipset, featuring the E8870SP component, allows for multi-node configurations of up to eight Intel® Itanium® processors.
Detailed specifications on each member of the Intel® Itanium® family.
Intel® Itanium® processors deliver robust performance and support today's most demanding business applications.
Brief: The Intel® Itanium® processor 9500 series features new microarchitecture to deliver superior performance, reliability, and power efficiency.
Electrical, thermal, and mechanical specs, pin listing, system management bus, signal definitions for the Intel® Itanium® processor 9300/9500 series.
White paper covers new RAS features, server integrity, top RAS differentiators, and competitive comparisons.
Watch how HP and Intel work together to deliver on the promise of mission-critical converged infrastructure.
Supplier listing: Intel® Itanium® processor 9300 series enabling components.
Discover how to implement server migration from expensive, proprietary platforms to Intel® technology-based solutions for mission-critical needs.
White Paper: Intel® Xeon® and Intel® Itanium® processor-based servers scale effective computing capabilities and lower power and cooling costs.
White Paper: Enhanced reliability, availability, and serviceability (RAS) of Intel® processor-based server platforms simplify business solutions.
Intel® E8870 (870) chipset device and documentation errata, specification clarifications, and changes.
Vendor List: support components for E8870 Chipset-based system designs.
White Paper: Intel® E8870 Chipset has architecture for Intel Itanium® processor-based servers and allows systems to scale from 2-16 processors.
Covers core code and services required for an implementation of the CPU I/O Protocol of the Intel® Platform Innovation Framework for EFI.
Defines core code for an implementation of the cache data hub subclass of the Intel® Platform Innovation Framework for EFI.
Datasheet: Intel® 7500 Scalable Memory Buffer Datasheet.
Packaging Databook, Ch. 13: Plastic Pin Grid Array Package technology, and its physical structure, electric modeling and performance.
Packaging Databook, Ch. 11: international packing specifications with rules and standards.
Packaging Databook, Ch. 10: product and transport media, environmental programs, tape and reel, protective bands, and shipping formats.
Packaging Databook Ch 7: leaded surface mount technology enables more reliable assemblies with higher I/O, board density, and less weight and cost.
Intel® Itanium® processor 9000 and 9100 series.
Packaging Databook, Ch 12: Profile of the Tape Carrier Package and its uses in areas that require lightweight small footprint integrated circuits.
Packaging Databook, Ch. 6: Electrical static discharge and electrical over stress.