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Intel® CoFluent™ Technology

Intel® CoFluent™ Technology enables solutions such as Intel® CoFluent™ Studio and Intel® CoFluent™ Reader.

Intel CoFluent Studio is a visual model-driven development (MDD) solution for use-cases modeling and executable specifications; it enables performance prediction and design-space exploration of complex hardware/software systems through unique mapping and partitioning technology. It goes beyond documents and spreadsheets and delivers explicit and dynamic system specifications covering behavioral, architectural, timing, and performance parameters: power, memory, cost, and loads.

Intel CoFluent Studio is an embedded system modeling and simulation toolset that supports model-driven architecture (MDA) concepts and Eclipse modeling framework (EMF) technology.

Intel CoFluent Studio generates SystemC transaction-level models from graphics—standard UML or domain-specific language (DSL)—and ANSI C/C++ describing complex multi-OS, multi-core systems.
Intel CoFluent Reader enables efficient exchange of executable specifications with all project stakeholders and contractors. 1

Virtualization Technologies
System Modeling Virtual System Virtual Platform Virtual Prototype
SW/FW Code Not needed Needed Needed
HW IP Not needed Needed Needed
Abstration and Accuracy Message-level MLM, no ISS TLM/CA + ISS RTL + ISS
Modeling Effort Low Medium/High High
Exploration and Optimization Factor High Medium/Low Low
Simulation speed Faster Faster 1
Virtual System: Intel Cofluent is used earlier for performance estimation of full device (SW + HW models)

Unique Positioning

To provide simulation results, other virtual prototyping technologies require extra effort and implementation-level HW/SW IP blocks. With Intel CoFluent Studio:

  • No hardware IPs needed
  • No embedded software needed
  • No firmware / OS needed
  • No ISS needed

Most CAD tools address software and hardware developments separately. Developers of electronic systems can no longer handle ever increasing complexity and sustain reduced development cycles with such tools. End-product cost reduction imperatives, increasing number of processors in a system, and other physical architecture constraints make system architecting an essential and decisive concern to electronic manufacturers.

diagram of Unique Tool Coverage in the Design Flow

Unique Tool Coverage in the Design Flow



Innovation: Capture design intent in reusable models mixing new features and legacy, allowing early patent application.

Optimization: Find optimal architecture and power efficiency through design space exploration free of full HW/SW code.

Validation: Define use case scenarios for validating real-time behavior, predicting performance and generating test cases for implementation.

Reduce time and cost

  • Design decisions by addressing all system-level issues
  • Parallel developments and implementation automation
  • Optimize designs
  • Mitigate risks and avoid costly errors
  • Project member interact closely upfront
  • Higher investment in modeling and architecting
  • HW/SW co-design and virtual architecture simulation


Product and Performance Information


1. This technology results from French public research within the École Polytechnique of the University of Nantes. It represents 20 years of research by Professor Jean-Paul Calvez on a methodology for the design of electronic systems: MCSE (Méthodologie de Conception de Systèmes Electroniques) which is in public domain.