App Note: Intel® E7500 MCH A2 x4/x8 DDR Memory Limitations
This application note discusses mixing x4 DIMMs with x8 DIMMs on a platform that contains the A2 stepping of the Intel® E7500 Memory Controller Hub (MCH). An erratum has been identified for the Intel® E7500 MCH such that mixing of x4 and x8 DIMM types is not allowed. This erratum exists in the A2 stepping of the Intel® E7500 MCH (Refer to the Intel® E7500 Chipset Memory Controller Hub (MCH) Specification Update (Order Number 290731)). The solution is to only populate with DIMMs that contain the same device type as each other, (i.e. all x4-based DIMMs or all x8-based DIMMs). This will ensure the correct operation of platforms with the A2 stepping. System and motherboard vendors have been notified and should not allow for these configurations.
Items that will be discussed in this document include: Identifying the A2 stepping of the Intel® E7500 MCH; Distinguishing between 4 and 8 DIMM modules, and Memory configuration limitations with systems that have the A2 stepping of the Intel® E7500 MCH.
Read the full Intel® E7500 MCH A2 x4/x8 DDR Memory Limitations Application Note.