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Intel® E7230 Chipset Memory Controller Hub: Datasheet


The Intel® E7230 chipset is designed for use with Intel® Pentium® 4 processor in the LGA775 Land Grid Array package on the 90-nm process, Intel® Pentium® D processor in entry-level UP server platforms. The chipset contains the following components: Memory Controller Hub (MCH), Intel® I/O Controller Hub 7 (ICH7), and Intel® 6700PXH 64-bit PCI Hub / Intel® 6702PXH 64-bit PCI Hub (PCI Express* x8 equivalent). The MCH provides the interface to the processor, main memory, PCI Express, and the ICH7. The ICH7 is the seventh generation I/O Controller Hub and provides a multitude of I/O related functions. The document is the datasheet for the Intel® E7230 MCH. Topics covered include: signal description, system memory map, register descriptions, a description of the MCH interfaces and major functional units, electrical characteristics, ball-out definitions, and package characteristics.

MCH Overview

A major role of the MCH in a system is to manage the flow of information between its four interfaces: the processor interface (FSB), the system memory interface (DRAM controller), the DMI interface, and the PCI Express port. This includes arbitrating between FSB, DMI and PCI Express when each initiates an operation. The processor interface supports the Intel® Pentium® 4 processor subset of the Extended Mode of the Scalable Bus Protocol. The MCH supports up to two channels of DDR2 SDRAM. It also supports the PCI Express based Intel® 6700PXH 64-bit PCI Hub/Intel® 6702PXH 64-bit PCI Hub. To increase system performance, the MCH incorporates several queues and a write cache. The MCH also contains advanced power management logic.

Read the full Intel® E7230 Chipset Memory Controller Hub Datasheet.

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