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Intel® 7500 Chipset Specification Update

This document is an update to the specifications contained in the Affected Documents table. This document is a compilation of device errata and documentation changes, and specification clarifications and changes. It is intended for hardware system manufacturers and software developers of applications, operating systems, or tools.

Information types defined in nomenclature are consolidated into the specification update and are no longer published in other documents.

This document may also contain information that was not previously published.
1. CPURST bit does not get cleared by hardware
Problem: SYRE register (Device: 20, Function: 2; Offset 0CCh): CPURST bit does not get cleared by hardware.
Implication: The Intel 7500 chipset IOH will not assert RESETO_N when CPURST is set if it has been set previously.
Workaround: The CPURST bit must be cleared prior to setting it.
Status: For the steppings affected, see the Summary Table of Changes.

2. VTX-RCV-DETECT pulse too large during receiver detection
Problem: The VTX-RCV-DETECT pulse has been measured as high as 700 mV.
Background: VTX-RCV- DETECT - The amount of voltage change allowed during Receiver Detection. The maximum is 600 mV for both 2.5 GT/s and 5 GT/s.
Implication: This may overstress PCIe* agents.
Workaround: None at this time
Status: For the steppings affected, see the Summary Table of Changes.

Read the full Intel® 7500 Chipset Specification Update.

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