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Intel® 7500 Chipset Datasheet

System Configuration Overview

The I/O Hub (IOH) component provides a connection point between various I/O components and Intel® QuickPath Interconnect (Intel® QPI)-based processors. Contact your local Intel representative for details on those processors.
For example topologies supported by the IOH, refer to Chapter 2, “Platform Topology.”
This document is for the common feature sets as well as feature differences between the platforms. Throughout the document, platform-specific features will be identified and spelled out. It is important for the reader to clearly comprehend the feature deltas and platform implications associated with designing the IOH for system compatibility.
Feature Summary
The IOH provides the interface between the Intel QPI processor and industry-standard PCI Express* components. The two Intel QPI interfaces are full-width links (20 lanes in each direction). The two x16 PCI Express Gen2 ports are also configurable as x8 and x4 links compliant to the PCI Express Base Specification, Revision 2.0. The single x4 PCI Express Gen2 port can bifurcate into two independent x2 interfaces. In addition, the legacy IOH supports a x4 ESI link interface for the legacy bridge. For multiprocessor platforms, non-legacy IOHs also support an additional x4 PCI Express Gen1 interface. The IOH supports the following features and technologies:
• Intel® QuickPath Interconnect multiprocessor-small profile
• Intel QPI multiprocessor-enterprise profile (Intel® Itanium® processor 9300 series-based platforms)
— Interface to CPU or other IOH (limited configurations)
• PCI Express Gen2
• Intel® I/O Accelerated Technology (Intel® I/OAT) Gen3 (updated DMA engine with virtualization enhancements)
• Intel® Management Engine (Intel® ME)

Read the full Intel® 7500 Chipset Datasheet.

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