Intel® 631xESB/632xESB I/O Controller Hub Datasheet.
This specification is intended for Original Equipment Manufacturers designing and building Intel® 631xESB/632xESB I/O Controller Hub-based products.
Functions and capabilities include:
• Enterprise South Bridge Interface (ESI) and PCI Express X8 upstream ports to Memory Controller Hub (MCH)
• PCI Express* Specification, Revision 1.0a-compliant
• PCI Protocol Addendum and PCI Electrical and Mechanical Addendum to the PCI Local Bus Specification, Revision 2.0a-compliant
• PCI Local Bus Specification, Revision 2.3-compliant with support for 33 MHz PCI operations
• ACPI power management logic support
• Enhanced DMA controller, interrupt controller, and timer functions
• Integrated serial ATA host controller with independent DMA operation on six ports and AHCI support
• Integrated IDE controller supports Ultra ATA100/66/33
• USB host interface with support for eight USB ports; four UHCI host controllers; one EHCI high-speed USB 2.0 Host controller Intel® 631xESB/632xESB I/O Controller Hub Datasheet 41 Introduction
• Dual Gigabit MAC with Kumeran interface to dual-PHY component
• PICMG-compliant Serdes backplane Gigabit Ethernet support
• Integrated Board Management Controller with basic ROM firmware, expandability through external flash and RAM memories
• System Management Bus (SMBus) Specification, Version 2.0-compliant with additional support for I2C* devices
• Audio interface (AC’97 and Intel® High Definition Audio)
• Low Pin Count (LPC) interface
• Firmware Hub (FWH) interface support
The Intel® 631xESB/632xESB I/O Controller Hub incorporates a variety of PCI functions that are divided into several logical devices (Bm:D0, B0:D28, B0:D29, B0:D30, B0:D31, Bn:D0, Bp:D0, Bp:D1 and Bp:D3). Provides drawings of the physical dimensions and characteristics of the 641-mBGA package.
Read the full Intel® 631xESB/632xESB I/O Controller Hub Datasheet.