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Intel Platform Innovation Framework for EFI System Management Mode Core Interface Specification (SMM CIS) v0.9

EFI System Management Mode Core Interface Spec(SMM CIS) v0.91
Intel® Platform Innovation Framework for EFI System Management mode core interface specification (SMM CIS), Version 0.9a.
This specification defines the core code and services that are required for an implementation of the System Management Mode (SMM) phase of the Intel® Platform Innovation Framework for EFI (hereafter referred to as the “framework”). This SMM Core Interface Specification (CIS) does the following:
• Describes the basic components of SMM
• Provides code definitions for services and functions that are architecturally required by the Intel® Platform Innovation Framework for EFI Architecture Specification
• Describes the interactions between SMM and other phases in the framework
• Describes processor-specific details in SMM mode for IA-32 and Intel® Itanium® processors
Rationale
Certain artifacts of the hardware and platform design require programmatic workarounds. This interface design aims to provide a clean mechanism for installing these modules. Possible candidates include the following:
• ACPI S3 reserve handler
• Enable/disable ACPI mode
• Power button support while not in ACPI mode
• Error logging for ECC/PERR/SERR in IA-32
• Protected flash writes on some IA-32 platforms
• Century rollover bug workaround
Organization of the SMM CIS
This SMM Core Interface Specification (CIS) is organized as listed in the table below. Because the SMM is just one component of a framework-based firmware solution, there are a number of additional specifications that are referred to throughout this document.
• For references to other framework specifications, click the hyperlink in the page or navigate through the table of contents (TOC) in the left navigation pane to view the referenced specification.
• For references to non-framework specifications, see references in the Interoperability and Component Specifications help system. November 19, 2003
Read the full EFI System Management Mode Core Interface Specification.

EFI System Management Mode Core Interface Spec(SMM CIS) v0.91
Intel® Platform Innovation Framework for EFI System Management mode core interface specification (SMM CIS), Version 0.9a.
This specification defines the core code and services that are required for an implementation of the System Management Mode (SMM) phase of the Intel® Platform Innovation Framework for EFI (hereafter referred to as the “framework”). This SMM Core Interface Specification (CIS) does the following:
• Describes the basic components of SMM
• Provides code definitions for services and functions that are architecturally required by the Intel® Platform Innovation Framework for EFI Architecture Specification
• Describes the interactions between SMM and other phases in the framework
• Describes processor-specific details in SMM mode for IA-32 and Intel® Itanium® processors
Rationale
Certain artifacts of the hardware and platform design require programmatic workarounds. This interface design aims to provide a clean mechanism for installing these modules. Possible candidates include the following:
• ACPI S3 reserve handler
• Enable/disable ACPI mode
• Power button support while not in ACPI mode
• Error logging for ECC/PERR/SERR in IA-32
• Protected flash writes on some IA-32 platforms
• Century rollover bug workaround
Organization of the SMM CIS
This SMM Core Interface Specification (CIS) is organized as listed in the table below. Because the SMM is just one component of a framework-based firmware solution, there are a number of additional specifications that are referred to throughout this document.
• For references to other framework specifications, click the hyperlink in the page or navigate through the table of contents (TOC) in the left navigation pane to view the referenced specification.
• For references to non-framework specifications, see references in the Interoperability and Component Specifications help system. November 19, 2003
Read the full EFI System Management Mode Core Interface Specification.

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