EFI Hand-Off Block (HOB) Specification v0.9
Intel® Platform Innovation Framework for EFI Hand-Off Block (HOB) Specification
This specification
defines the core code that is required for an implementation of Hand-Off Blocks (HOBs) in the Intel® Platform Innovation Framework for EFI (hereafter referred to
as the “Framework”). A HOB is a binary data structure that passes system state information from the HOB producer phase to the HOB consumer phase in the Framework
architecture. This HOB specification does the following:
• Describes the basic components of HOBs and the rules for constructing them
• Provides code
definitions for the HOB data types and structures that are architecturally required by the Intel® Platform Innovation Framework for EFI Architecture
Specification
Data Structure Descriptions
Intel® processors based on 32-bit Intel® architecture (IA-32) are “little endian” machines. This
distinction means that the low-order byte of a multibyte data item in memory is at the lowest address, while the high-order byte is at the highest address.
Processors of the Intel® Itanium® processor family may be configured for both “little endian” and “big endian” operation. All implementations designed to conform
to this specification will use “little endian” operation.
In some memory layout descriptions, certain fields are marked reserved. Software must initialize
such fields to zero and ignore them when read. On an update operation, software must preserve any reserved field.
Read the full EFI Hand-Off Block Specification.
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EFI Hand-Off Block (HOB) Specification v0.9
Intel® Platform Innovation Framework for EFI Hand-Off Block (HOB) Specification
This specification
defines the core code that is required for an implementation of Hand-Off Blocks (HOBs) in the Intel® Platform Innovation Framework for EFI (hereafter referred to
as the “Framework”). A HOB is a binary data structure that passes system state information from the HOB producer phase to the HOB consumer phase in the Framework
architecture. This HOB specification does the following:
• Describes the basic components of HOBs and the rules for constructing them
• Provides code
definitions for the HOB data types and structures that are architecturally required by the Intel® Platform Innovation Framework for EFI Architecture
Specification
Data Structure Descriptions
Intel® processors based on 32-bit Intel® architecture (IA-32) are “little endian” machines. This
distinction means that the low-order byte of a multibyte data item in memory is at the lowest address, while the high-order byte is at the highest address.
Processors of the Intel® Itanium® processor family may be configured for both “little endian” and “big endian” operation. All implementations designed to conform
to this specification will use “little endian” operation.
In some memory layout descriptions, certain fields are marked reserved. Software must initialize
such fields to zero and ignore them when read. On an update operation, software must preserve any reserved field.
Read the full EFI Hand-Off Block Specification.
