Shows how to view tasks on VxWorks and compile objects exposed to debugging. (v.1, June 2009)
Shows how to view tasks on Linux and compile objects exposed to debugging. (v.1, June 2009)
To better understand how Intel® multi-core creates expansiveness and efficiency simultaneously, this brief summation defines advantages, identifies complexities, and cites industry use.
Ishu Verma discusses Android* SDK and NDK toolsets as well as the benefits of using NDK. (v.001, Oct. 2011)
Mark Hatle describes creating a custom embedded distribution on any architecture. (v.001, Oct. 2011)
Webinar details AltiVec* SIMD macros translator migration to Intel® processors. (v.1, May 2009)
A discussion of experimental techniques for rapid mitigation of phishing and spam. (v.1 June 2009)
External Design Spec, Vol. 2: Configuration registers for two processor families. (v.2.1, May 2012)
External Design Specification: Electrical, signal, and thermal specs, definitions. (v.002.2, July 2012)
Platform Design Guide: Recommendations for platform controller hub and system memory. (v.2.1, April 2012)
Schematic: Provides the Cadence* and OrCAD* schematic symbol files.
原名 Maho Bay (Ivy Bridge + Panther Point)
原名 Chief River (Ivy Bridge + Panther Point)
收發器連接含有整合式媒體存取控制器的合適 Intel® 晶片組。
原名 Carlow (Ivy Bridge + Panther Point)
原名 Tolapai

