These manuals describe the architecture and programming environment of the Intel® 64 and IA-32 architectures.
Electronic versions of these documents allow you to quickly get to the information you need and print only the pages you want. The Intel® 64 and IA-32 Architectures Software Developer's Manuals are now available for download via a three volume set or a seven volume set. All content is identical in each set; see details below.
At present, downloadable PDFs of all volumes are at version 047. The downloadable PDF of the Intel 64 and IA-32 Architectures Optimization Reference manual is at version 027. Additional related specifications, application notes and white papers are also available for download.
Note: We are no longer offering the Intel® 64 and IA-32 Architectures Software Developer’s Manuals on CD-ROM. Hardcopy versions of the manual are available for purchase via a print-on-demand fulfillment model through a third-party vendor, Lulu (please reference 1 and 2 below): http://www.lulu.com/spotlight/IntelSDM.
- Terms of use
- The order price of each volume is set by the print vendor; Intel uploads the finalized master with zero royalty.
Combined Volume Set of Intel® 64 and IA-32 Architectures Software Developer’s Manuals
| Intel® 64 and IA-32 Architectures Software Developer’s Manual Combined Volumes:1, 2A, 2B, 2C, 3A, 3B, and 3C |
This document contains the following: Volume 1: Describes the architecture and programming environment of processors supporting IA-32 and Intel 64 Architectures. Volume 2: Includes the full Instruction Set Reference, A-Z, in one volume. Describes the format of the instruction and provides reference pages for instructions. Volume 3: Includes the full System Programming Guide, Parts 1, 2, and 3, in one volume. Describes the operating-system support environment of Intel 64 and IA-32 Architectures, including: memory management, protection, task management, interrupt and exception handling, multi-processor support, thermal and power management features, debugging, performance monitoring, system management mode, VMX instructions, and Intel® Virtualization Technology (Intel® VT). |
Intel® 64 and IA-32 Architectures Software Developer's Manual Documentation Changes |
Describes bug fixes made to the Intel 64 and IA-32 Architectures Software Developer's Manual between versions. NOTE: This Change Document applies to all Intel 64 and IA-32 Architectures Software Developer’s Manual sets (combined volume set, 3 volume set and 7 volume set). |
3 Volume Set of Intel® 64 and IA-32 Architectures Software Developer’s Manuals
| This set consists of Volume 1, Volume 2 (combined 2A, 2B, and 2C), and Volume 3 (combined 3A, 3B, and 3C). This set allows for easier navigation of the Instruction Set Reference and System Programming Guide through functional cross-volume table of contents, references and index. | |
| Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture |
Describes the architecture and programming environment of processors supporting IA-32 and Intel 64 Architectures. |
| Intel® 64 and IA-32 Architectures Software Developer's Manual Combined Volumes 2A, 2B, and 2C: Instruction Set Reference, A-Z |
This document contains the full Instruction Set Reference, A-Z, in one volume. Describes the format of the instruction and provides reference pages for instructions. This document allows for easy navigation of the Instruction Set Reference through functional cross-volume table of contents, references and index. |
| Intel® 64 and IA-32 Architectures Software Developer's Manual Combined Volumes 3A, 3B, and 3C: System Programming Guide, Parts 1 and 2 |
This document contains the full System Programming Guide, Parts 1, 2, and 3, in one volume. Describes the operating-system support environment of Intel 64 and IA-32 Architectures, including: memory management, protection, task management, interrupt and exception handling, multi-processor support, thermal and power management features, debugging, performance monitoring, system management mode, VMX instructions, and Intel® Virtualization Technology (Intel® VT). This document allows for easy navigation of the System Programming Guide through functional cross-volume table of contents, references and index. |
7 Volume Set of Intel® 64 and IA-32 Architectures Software Developer’s Manuals
| This set contains the same information as the 3 volume set, but separated into seven smaller PDFs: Volume 1, Volume 2A, Volume 2B, Volume 2C, Volume 3A, Volume 3B, and Volume 3C. This set is better suited to those with slower connection speeds. | |
| Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture |
Describes the architecture and programming environment of processors supporting IA-32 and Intel 64 Architectures. |
| Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 2A: Instruction Set Reference, A-L |
Describes the format of the instruction and provides reference pages for instructions (from A to L). This volume also contains the table of contents for Volumes 2A, 2B, and 2C. |
| Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 2B: Instruction Set Reference, M-Z |
Provides reference pages for instructions (from M to Z). |
| Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 2C: Instruction Set Reference |
Includes the Safer Mode Extensions Reference. This volume also contains the appendices and index support for Volumes 2A, 2B, and 2C. |
| Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3A: System Programming Guide, Part 1 |
Describes the operating-system support environment of an IA-32 and Intel 64 Architectures, including: memory management, protection, task management, interrupt and exception handling, and multi-processor support. This volume also contains the table of contents for Volumes 3A, 3B, and 3C. |
| Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide, Part 2 |
Continues the coverage on system programming subjects begun in Volume 3A. Volume 3B covers thermal and power management features, debugging, and performance monitoring. |
| Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3C: System Programming Guide, Part 3 |
Continues the coverage on system programming subjects begun in Volumes 3A and Volume 3B. Volume 3C covers system management mode, VMX instructions, and Intel® VT. This volume also contains the appendices and indexing support for Volumes 3A, 3B, and 3C. |
Software Optimization Reference Manual
| Intel® 64 and IA-32 Architectures Optimization Reference Manual | Intel 64 and IA-32 Architectures Optimization Reference Manual provides information on Intel® Core™ processors, Intel NetBurst® microarchitecture and other recent Intel® microarchitectures. It describes code optimization techniques to enable you to tune your application for highly optimized results when run on Intel® Atom™, Intel® Core™ i7, Intel® Core™, Intel® Core™2 Duo, Intel® Core™ Duo, Intel® Xeon®, Intel® Pentium® 4, and Intel® Pentium® M processors. |
Related specifications, application notes and white papers
| Intel® 64 Architecture x2APIC Specification | Extensions to the xAPIC architecture are intended primarily to increase processor addressability. The x2APIC architecture provides backward compatibility to the xAPIC architecture and forward extendability for future Intel platform innovations. |
| Intel® 64 and IA-32 Architectures Application Note TLBs, Paging-Structure Caches, and Their Invalidation | The information contained in this application note is now part of Intel 64 and IA-32 Architectures Software Developer's Manual Volumes 3A and 3B. |
| Intel® Advanced Encryption Standard New Instructions (Intel® AES-NI) Set White Paper | This paper gives an overview of the AES algorithm and the Intel® AES-NI. It provides guidelines and demonstrations for using these instructions to write secure and high performance AES implementations. |
| Intel® Architecture Instruction Set Extensions Programming Reference | This document covers new instructions slated for future Intel processors. |
| Intel® Carry-Less Multiplication Instruction and its Usage for Computing the GCM Mode White Paper | This paper provides information on the instruction, and its usage for computing the Galois Hash. It also provides code examples for the usage of PCLMULQDQ, together with the Intel® AES New Instructions (Intel® AES-NI) for efficient implementation of AES in Galois Counter Mode (AES-GCM). |
| Intel® 64 Architecture Memory Ordering White Paper | This document has been merged into Volume 3A of Intel 64 and IA-32 Architectures Software Developer’s Manual. |
| Performance Monitoring Unit Sharing Guide | This paper provides a set of guidelines between multiple software agents sharing the PMU hardware on Intel processors. |
| Intel® Virtualization Technology FlexMigration (Intel® VT FlexMigration) Application Note | This application note discusses virtualization capabilities in Intel® processors that support Intel® VT FlexMigration usages. |
| Intel® Virtualization Technology for Directed I/O Architecture Specification |
This document describes the Intel® Virtualization Technology for Directed I/O. |
