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Intel helps define new serial ATA standards for faster and more efficient data transfer.
Thunderbolt™ technology is a single-cable, I/O technology for data transfers among multiple devices and device types that use different protocols.
Technical details to understand USB 3.0 and 2.0 spec requirements, design compatible products, download developer-related PDFs, and more.
Intel® Universal Serial Bus (USB) technology overview: wireless USB, industry collaboration, standards.
The EHCI compliance testing evaluates the EHCI controller function of a USB 2.0 Host controller.
The Wireless Host Controller Interface describes the register-level interface for a Host Controller for Wireless (USB) Revision 1.0.
White Paper: Notice of certain USB 3.0* devices and cables causing radio frequency interference to wireless devices operating in the 2.4 GHz ISM band.
Specification: Describes the enhanced host controller interface for USB 2.0, including the system software/host controller hardware interface.
Specification 0.92: defines core code for an implementation of the Human Interface Infrastructure of the Intel® Platform Innovation Framework for EFI.
See a server demonstration featuring Intel® Xeon® processor-based servers and Intel® Solid-State drives running Oracle TimesTen* In-Memory Database.
User Agreement: legal terms that govern participant comments, suggestions and input during the high definition audio specification development.
Intel® HD Graphics enables superior mainstream gaming and 3D experiences without the need for a discrete graphics card.
Intel® Many Integrated Core (Intel® MIC) architecture is the latest breakthrough in supercomputing speed, performance, and compatibility.
Technology Brief: Intel® Smart Response Technology provides a storage solution that lets users fast-track favorite applications and files.
Vendor matrix references platforms and operating environments supported by Intel® Trusted Execution Technology (Intel® TXT).
White Paper: Energy-efficient platform considerations for application software and services.
Presentation: Intel Developer Forum 2010, interconnect bus extensions for energy efficient platforms.
For laptop power management, Intel works with hardware manufacturers, developers, and vendors to create a framework that optimizes energy usage.
Summary of PCI Express* capabilities for revision 3.0 accelerator features of the specification.
Presentation: PCI Express* Electrical Requirements for Designing ASICs on Intel Platforms covers background, Silicon TX, silicon RX test, and more.
White Paper: PCI Express* Architecture, benefits of designing components and systems.
PCI Express* Architecture is a standards-based serial data, multi-lane interconnect for high-performance, scalable interconnects.
White Paper: Intel® Developer Network for PCI Express* Architecture, benefits and graphics usages.
PCI Express* Architecture is a standards-based serial data, multi-lane interconnect for high-performance, scalable interconnects.
Presentation: Intel Developer Forum 2010, implementation guidelines for PCI Express* technology extensions.