The Intel® 3200 and Intel® 3210 Chipsets are designed for use with Intel® Xeon® processors 30001 sequence, in the LGA775 package in UP server platforms. The chipset contains two components: Memory Controller Hub (MCH) and Intel® I/O Controller Hub 9 (ICH9). The MCH provides the interface to the processor, main memory, PCI Express*, and the ICH9. The ICH9 I/O Controller Hub provides a multitude of I/O related functions.
The Intel® 3200 Chipset supports one PCI Express x8 port for I/O. Intel® 3210 Chipset supports two PCI Express x8 ports or one PCI Express x16 port for I/O.
| Features and benefits | |
|---|---|
| Supports processors | Provides four execution cores in one physical processor helping increase system responsiveness and performance for multi-tasking. Also supports dual-core processors. |
| 1333/1066/800 MHz FSB | Supports Intel® Xeon® processor 3000 sequence and processors in the LGA775 socket, with scalability for future processor innovations. |
| Supports Intel® 64 architecture | Runs 64-bit code and accesses larger amounts of memory while also capable of running existing 32-bit applications. |
| Memory Support for Dual Channel DDR2 800/667 with ECC support | Improved memory speed over previous generation and provides ECC for data integrity protection. Delivers up to 12.8 GB/s (DDR2 800 dual 6.4 GB/s) of bandwidth and 8 GB memory addressability for faster system responsiveness and support of 64-bit computing. |
| PCI Express* I/O Interfaces supports 1 x8 with the Intel® 3200 Chipset, and 2 x8 or 1 x16 with the Intel® 3210 Chipset | The Intel 3210 Chipset supports flexible I/O with 2x8 or 1x16 PCI Express, and the Intel 3200 Chipset provides a single PCI Express I/O x8 port . Also provides configurable Intel® I/O Controller Hub (ICH9R) 6x1 PCI Express ports to meet higher I/O server demands. Multiple interfaces eliminates the need for bridge solutions and reduces server bottlenecks. |
| Serial ATA* (SATA) 3 Gb/s | High-speed storage interface supports faster transfer rate for improved data access. |
| Intel® Matrix Storage Technology | With a second hard drive added, provides quicker access to data files with RAID 0, 5, and 10, and greater data protection against a hard disk drive failure with RAID 1, 5, and 10. Support for external SATA* (eSATA*) enables the full SATA interface speed outside the chassis, up to 3 Gb/s. |
| Enhanced Intel SpeedStep® Technology | Enables focused platform and software power management to lower average power consumption while maintaining application performance and improving acoustics. |
| PCI-X Interface | Support legacy PCI-X server adapters using the Intel® 6702PXH 64-bit PCI hub. |
| Supports Hyper-Threading Technology | Delivers higher processing throughput and faster response times for multi-tasking, multi-threading workload environments. |
Additional information: 1 2 3
Technical Documents
View More Technical Documents >-
Intel® ICH9 Family...
Datasheet: Intel® I/O Controller Hub 9 (ICH9) family.
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Datasheet, Intel® 3200...
Describes signal description, address map, MCH description, DRAM controller registers, bridge...
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Intel® ICH9 Family...
Presents product specifications, thermal metrology, ATX thermal solution guide for Intel® ICH 9 family.
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Thermal Guide, Intel®...
Intel® 3200 and Intel® 3210 Chipset Memory Controller Hub (MCH) Thermal and Mechanical Design Guide.
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Spec Update, Intel® I/O...
Intel® I/O Controller Hub 9 (ICH9) family device and documentation errata, specification clarifications,...
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Spec Update 2009, Intel®...
Intel® 3200, 3210 Chipset memory controller hub (MCH), clarifications, changes, and documentation...
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| Packaging information | |
| Intel® 3200 and 3210 Memory Controller Hub (MCH) chipset | 1300 Flip Chip Ball Grid Array (FC-BGA) |
| Intel® ICH9R I/O Controller Hub | 676 mBGA |
| Intel® 6700PXH 64-bit PCI Hub | 567 Flip Chip Ball Grid Array (FC-BGA) |


