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Arquitectura Intel® Many Integrated Core - Arquitectura

La arquitectura Intel® Many Integrated Core (Intel® MIC) es el último avance en velocidad, rendimiento y compatibilidad para la superinformática.

Ohio Supercomputer Center: HPC as a Competitive Differentiator

At the Ohio Supercomputer Center, an Intel® Xeon® processor-based system delivers 1.5x the performance at 60% of the power of the previous platform.

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Russian Joint Supercomputer Center Breaks Records

Case Study: Russia’s Joint Supercomputer Center deploys an Intel® Xeon Phi™ coprocessor-based platform for record performance and energy efficiency.

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Intel® Xeon Phi™ Coprocessor: Software Developers Guide

Software Developers Guide: Intel® Xeon Phi™ coprocessor architecture, power management, RAS features, OS support, APIs, usage models, more.

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NAG Solves Large Data Problems Quickly

NAG’s Mike Dewar discusses how porting legacy code to Intel® Xeon Phi™ coprocessors enables users to solve large data problems quickly.

Supermicro Reduces Financial and Power Costs with Intel® Xeon Phi™

Supermicro explains how Intel® Xeon Phi™ coprocessor’s parallel workload performance reduces financial and power costs of high performance computing.

ScaleMP Improves Performance of Large Scale Virtual Machines

ScaleMP’s Shai Fultheim explains how Intel® Xeon Phi™ coprocessors run large scale virtual machines without the constraints of physical systems.

Intel® Xeon Phi™ Coprocessor: Architecture for Discovery

The Intel® Xeon Phi™ coprocessor provides superior parallel performance for many applications, such as meteorology and medical research.

Guide: Intel® Xeon Phi™ Coprocessor Safety and Compliance

Guide: Describes Intel® Xeon Phi™ coprocessor safety and compliance standards for system installation, including grounding and cooling requirements.

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Datasheet: Intel® Xeon Phi™ Coprocessor

Datasheet: Documentation for the Intel® Xeon Phi™ coprocessor, including architecture, thermal and mechanical specs, pin data, and power management.

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