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Intel Announces New 22nm 3D Tri-gate Transistors
Presentation: Intel introduces a fundamentally different technology for future microprocessor families, 3D transistors manufactured at 22nm.

Presentation: Intel introduces a fundamentally different technology for future microprocessor families, 3D transistors manufactured at 22nm.

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Silicon Technology from Intel [68 K]
Intel continues to introduce innovative process technologies, delivering leaps in performance, energy efficiency, and enabling richer applications.

Intel continues to introduce innovative process technologies, delivering leaps in performance, energy efficiency, and enabling richer applications.

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Evaluation/Transport Physics: Schottky-Gate III-V Compound Semiconductor QWFE Transistors
Paper examines and evaluates logic performance of Schottky-gate QWFETs against that of advanced Strained Si MOSFETs in low power voltages.

Paper examines and evaluates logic performance of Schottky-gate QWFETs against that of advanced Strained Si MOSFETs in low power voltages.

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Non-Planar, Multi-Gate InGaAs QWFETs with High-K Gate Dielectric and Ultra Scaled Gate-to-Drain/Gate-to-Source Separation
Paper: non-planar, multi-gate InGaAs QWFETs with high-K gate dielectric and ultra-scaled gate-to-drain and gate-to-source separations of 5nm.

Paper: non-planar, multi-gate InGaAs QWFETs with high-K gate dielectric and ultra-scaled gate-to-drain and gate-to-source separations of 5nm.

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Advanced High-K Gate Dielectric for Short-Channel in QWFE Transistors on Silicon Substrate
Paper: composite high-K gate in the QWFET silicon substrate integration for thin electrical oxide, low gate leakage, and carrier confinement.

Paper: composite high-K gate in the QWFET silicon substrate integration for thin electrical oxide, low gate leakage, and carrier confinement.

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Role of High-K Gate Dielectrics
Presentation Discusses Role of High-K Gate Dielectrics and Metal Gate Electrodes in Emerging Nanoelectronic Devices.

Presentation Discusses Role of High-K Gate Dielectrics and Metal Gate Electrodes in Emerging Nanoelectronic Devices.

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Strained Germanium QWFE Transistor as P-Channel Device Option for Low Power III-V CMOS Architecture
Demonstrates a Germanium p-channel QWFET with thin scaled TOXE and high mobility, delivering four times higher hole mobility.

Demonstrates a Germanium p-channel QWFET with thin scaled TOXE and high mobility, delivering four times higher hole mobility.

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Gate Dielectric Scaling for High-Performance CMOS: SiO2 to High-K
Gate Dielectric Scaling for High-Performance CMOS: SiO2 to High-K, an option for the 45nm high-performance logic technology node.

Gate Dielectric Scaling for High-Performance CMOS: SiO2 to High-K, an option for the 45nm high-performance logic technology node.

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Advanced High-K Gate Dielectric for Short-Channel in QWFE Transistors on Silicon Substrate
Paper: composite high-K gate in the QWFET silicon substrate integration for thin electrical oxide, low gate leakage, and carrier confinement.

Paper: composite high-K gate in the QWFET silicon substrate integration for thin electrical oxide, low gate leakage, and carrier confinement.

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Intel® 22nm Technology [72 K]
Introducing 3-D transistors manufactured at 22nm for future microprocessor families, continuing pursuit of Moore's Law.

Introducing 3-D transistors manufactured at 22nm for future microprocessor families, continuing pursuit of Moore's Law.

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Intel® 64 Architecture Introduction: Demo [60 K]
Demo introduces Intel® 64 Architecture for large-scale, memory hungry applications. This reduces swapping and improves performance.

Demo introduces Intel® 64 Architecture for large-scale, memory hungry applications. This reduces swapping and improves performance.

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Arquitetura Intel® 64 [65 K]
A arquitetura Intel® 64 expande a memória endereçável para mais de 4 GB permitindo a computação de 64 bits em designs embarcados, melhorando o desempenho.

A arquitetura Intel® 64 expande a memória endereçável para mais de 4 GB permitindo a computação de 64 bits em designs embarcados, melhorando o desempenho.

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First the Tick, Now the Tock: Intel® Microarchitecture (Nehalem)
White Paper discusses Intel® Microarchitecture (Nehalem), the basis for the Intel® Xeon® processor 3500 and 5500 series.

White Paper discusses Intel® Microarchitecture (Nehalem), the basis for the Intel® Xeon® processor 3500 and 5500 series.

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Intel Built-in-Visuals Demo [72 K]
The visual features built into the processor deliver everything you need to enjoy a stunning and seamless experience when viewing content on your PC.

The visual features built into the processor deliver everything you need to enjoy a stunning and seamless experience when viewing content on your PC.

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Intel® 64 and IA-32 Architectures Developer's Manual: Combined Volumes
Architectures Software Developer's Manual: Intel® 64 and IA-32 includes supporting processors programming environment and architecture.

Architectures Software Developer's Manual: Intel® 64 and IA-32 includes supporting processors programming environment and architecture.

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Jasper Forest From Intel Animation [69 K]
Video introduces Jasper Forest: the newest addition to the Intel® Xeon® processor family.

Video introduces Jasper Forest: the newest addition to the Intel® Xeon® processor family.

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JTAG 101: IEE 1149.x and Software Debug
White Paper: Quick JTAG 101 overview of the various implementations and names of debug methods to help users migrate to IA32. (Jan. 2009)

White Paper: Quick JTAG 101 overview of the various implementations and names of debug methods to help users migrate to IA32. (Jan. 2009)

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Tick, Tock: Next Gen Intel® Microarchitecture Nehalem
White Paper: Outlines next gen Intel® microarchitecture Nehalem benefits: scalability, power efficiency, and performance. (v.001, Apr. 2008)

White Paper: Outlines next gen Intel® microarchitecture Nehalem benefits: scalability, power efficiency, and performance. (v.001, Apr. 2008)

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Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3 (3A & 3B): System Programming Guide [68 K]
This manual is part of a set that describes the architecture and programming environment of Intel 64 and IA-32 Architecture processors.

This manual is part of a set that describes the architecture and programming environment of Intel 64 and IA-32 Architecture processors.

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Presentation: Low Power Optimize a 32nm SoC Platform Technology
Presentation: low power optimization for a 32nm SoC platform with 2nd generation high-k/Metal gate transistors.

Presentation: low power optimization for a 32nm SoC platform with 2nd generation high-k/Metal gate transistors.

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RF CMOS Technology Scaling in High-k/Metal Gate Era for RF SoC App
Brief examines the impacts and benefits of RF CMOS technology scaling in high-k/Metal gate era for RF SoC (System-on-Chip) applications.

Brief examines the impacts and benefits of RF CMOS technology scaling in high-k/Metal gate era for RF SoC (System-on-Chip) applications.

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Moore’s Law and Intel Innovation [62 K]
Intel's Moore's Law inspires the creation of groundbreaking new technologies and energy efficiency. (For consumers.)

Intel's Moore's Law inspires the creation of groundbreaking new technologies and energy efficiency. (For consumers.)

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High Performance 32nm Logic Technology
Record NMOS and PMOS drive currents are reported, along with the tightest contacted gate pitch for a 32nm or 28nm technology.

Record NMOS and PMOS drive currents are reported, along with the tightest contacted gate pitch for a 32nm or 28nm technology.

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Optimize 32nm SoC Platform Technology, 2nd Generation High-k/Met
Paper covers optimization for a 32nm SoC platform with 2nd Generation high-k/Metal gate transistors.

Paper covers optimization for a 32nm SoC platform with 2nd Generation high-k/Metal gate transistors.

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Intel® Atom™ Processor HD [69 K]
Video: Intel® Atom™ Processor HD.

Video: Intel® Atom™ Processor HD.

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