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2010 Asia Academic Forum
Home ›Intel® Education Initiative › 2010 Asia Academic Forum › Track 3: Software for Multi-core & System on Chip ›
Track 3: Software for Multi-core & System on Chip
Track Speakers:    
Kalyan Muthukumar
Principal Engineer

Kalyan Muthukumar Kalyan Muthukumar, a Principal Engineer, has been at Intel since 1997. He has primarily worked on Compiler Optimization and Performance Analysis for Intel IPF compilers. During this time, he developed and implemented several optimizations on Software Pipelining and Global Code Scheduler in the Intel compiler. His interests are in compiler optimization, code generation, software pipelining, scheduling, and performance and power analysis. Prior to joining Intel, he worked at IBM, San Jose for 4 years and at Apple for 1.5 years. He has 9 issued patents and 3 patents pending. He has published 13 papers in refereed conferences and journals. Kalyan did his B.Tech from Indian Institute of Technology (IIT) Madras, M.S. from Rensselaer Polytechnic Institute, Troy, NY, and Ph.D. in Computer Science from the University of Texas at Austin.

Presentation Title Parallel Programming for Multi-Core Platforms

Since the 80s, performances of single-threaded programs have seen steady improvements due to new techniques in Instruction-Level Parallelism (ILP). We took for granted that processor frequencies will increase over time and thus the performances of all applications will be boosted by the increased processor frequencies. However, it was apparent that we were reaching the limits of ILP, and in the middle of the past decade, we hit a power wall due to the increased leakage power with higher frequencies. In effect, we reached the limit of single-core performance, and the only viable option was to move to multi-core/many-core architectures. But, how do we program for these architectures? This is still a very difficult problem, even after more than 40 years of research in parallel programming.

In this talk, I will describe some of the approaches that Intel is using in our Parallel Programming Tools. I will briefly describe some of our tools like Parallel Studio, RapidMind, Ct, etc. At Intel, our goal is to make it easier for the programmers to exploit the parallelism available in multi-core/many-core architectures and get the best possible performance for their applications.

Michael Wrinn
Manager, Innovative Software Education

Michael Wrinn Bio: Michael Wrinn manages Intel's Innovative Software Education team, which collaborates with universities to bring parallel computing to the mainstream of undergraduate education. He is in demand as a speaker, recently giving talks and workshops at Peking University, Berkeley and others; he was a keynote speaker at the SIGCSE 2010 (the ACM Technical Symposium on Computer Science Education), and will deliver a full-day tutorial at the SC10 (the International Conference for High Performance Computing). Wrinn serves as a member of the ACM Education Council, bringing industrial perspective to curriculum evolution, especially the impact of parallel computing. Prior Intel roles include managing Intel's software engineering lab in Shanghai, and directing research on human interface technology. He was Intel's representative for the original OpenMP specification, and remains active in the parallel computing community. Before joining Intel, Michael worked at Accelrys, implementing commercial and research simulation codes on a wide variety of parallel/HPC systems. He holds a B.Sc. and Ph.D. (in quantum mechanics) from McGill University.

Presentation Title Parallel Computing in undergraduate education: progress and opportunity

Nearly overnight, mainstream computing platforms have evolved from sequential to parallel, prompting reconsideration of approaches to computer science education. The academic community -- particularly in Asia -- is responding strongly to this challenge, with changes completed or underway at many levels of the curriculum. We look at highlights of accomplishments among member of the Intel Academic Community, and outline compelling opportunities to move forward, with announcements about the Manycore Testing Lab, the industry consortium Education Alliance for Parallel Future (EAPF), and curriculum development grants.

Seow, Chen Yong
SW Engineering Manager

Seow, Chen Yong Chen Yong leads a SW Engineering team for Embedded SoC products. He worked in microcontroller logic design, FPGA, firmware, board design, end product prototyping, high speed signal integrity simulation and validation, software architecture, hardware abstraction layer and device driver development. He led SW development team for IXP4XX network processor and developed QoS microcode for IXP1200. Chen Yong holds a bachelor’s degree in Electrical, Electronic and System Engineering from National University of Malaysia (1991). In his leisure time, he jogs, swim, volleyball and read.

Presentation Title Software for SoC, its Challenges and Opportunity

The presentation will talk about the Embedded fragmented requirements and Intel approaches to meet and exceed the requirements. Software as key differentiator plays a key role to enable Embedded SOC products and fulfilling the demand of the emerging use cases. The talk will also suggest key areas of innovation and research.