Select a location for
Intel Education
2010 Asia Academic Forum
Home ›Intel® Education Initiative › 2010 Asia Academic Forum › Track 2: Silicon & Manufacturing Technologies ›
Track 2: Silicon & Manufacturing Technologies
Track Speakers:    
Aziz Safa
Director of Factory Automation

Aziz Safa Aziz Safa is Director of Factory Automation in the Assembly Test Technology Development (ATTD) organization for Intel Corporation.

The Factory Automation group within ATTD is responsible for information systems and services supporting assembly/test technology development, high volume assembly/test production lines and Technology Manufacturing Group (TMG) decision support systems.

Aziz began his career with Intel in 1993, and has served in numerous Automation management roles in manufacturing factories in New Mexico and Arizona. Prior to joining Intel, Aziz held management and engineering level positions at Advanced Micro Devices where he worked on yield tools and process control systems supporting the manufacturing lines.

Aziz graduated from Texas State University in 1987 with a Masters Degree in Computer Science and a Bachelors Degree in Mathematics and Computer Science.

Presentation Title Automation trends in high volume manufacturing and supply chain

Trends in high volume manufacturing and supply chain with focus on implications to education and hiring requirements for future college graduates.

G Sreenivas
Business Unit Manager – TMG India

G Sreenivas Sreenivas is the General Manager of Technology Manufacturing Group-India. He joined Intel in 2001 and currently manages the group at India that provides Automation Solutions to Intel’s Fab/Sort/Assembly/Test Manufacturing operations. Before this, he was a Process Engineering Manager at Fab22 and was involved in multiple process technology start-ups and ramp cycles leading several technology development and transfer efforts. Prior to joining Intel Corporation, he was involved in process development, productization, manufacturing, and technology transfer of DLP (Digital Light Processing) products and advanced CMOS process technology research at Texas Instruments Inc at Dallas, TX.

Sreenivas has Masters and Ph.D. degrees in Electrical Engineering and an MBA. He has been engaged in research and development, and manufacturing processes/methods in the area of microelectronics for over 20 years. He holds United States Patents and has published scores of papers in reputed international journals and presented papers in the field of microelectronics/device physics.

Presentation Title Challenges & Opportunities, benchmark and key trends, and strategy in technology, manufacturing, and automation in Electronic Packaging arena.

Historically, the primary function of microprocessor packaging has been to facilitate electrical connectivity of the complex silicon chips to the printed circuit board, while providing mechanical protection to the chip from the external environment. However, as microprocessor performance continues to follow Moore’s law, various levels of integration becomes necessary to meet the needs of different market segments. Thus, electronics packaging continues to include expanding and evolving topics and technologies, as the demands for smaller, faster, and lighter products continues without signs of abatement. These demands mean that individuals in each of the specialty areas involved in electronics packaging-such as electronic, mechanical, and thermal designers, and manufacturing and test engineers-are all interdependent on each others knowledge. The art and science of semiconductor packaging has advanced radically over the past decades as faster, more powerful, and cheaper computing devices with tens of millions of transistors continue to become a necessity. These advances require and will continue to require significant advances in the areas of mechanical integrity, signal integrity, power delivery and power dissipation, with constant market driven cost pressures. Recent trends in nano-technologies, system-on-a-chip vs. system-in-a-package, advanced analysis / simulation tools and metrologies will also need to be comprehended.

The packaging of electronic devices and systems represents a significant challenge for technologists. Performance, efficiency, cost considerations, dealing with the newer IC packaging technologies, and EMI/RFI issues all come into play. This presentation will focus on a broad perspective of the challenges in IC packaging, packaging benchmark and key trends, and strategy in technology, manufacturing, and automation to meet the above challenges.

Karnail Singh
Yield and New Product Introduction Manager

Karnail Singh Karnail Singh is currently the Yield and New Product Introduction Manager of Assembly and Test Manufacturing Group. He is currently relocated to Intel Products, Vietnam. Karnail established the Intel Products Vietnam Technical Steering Council and grew the site technical leadership pipeline. He is also responsible Intel Vietnam’s factory yields as well as the transfer and startup of new products and technology.

Karnail started his career at Intel Penang, Malaysia in 1994 as a Product Engineer for the Pentium 60Mhz product. He was part of the EIT(Early Involvement Team) which was sent to Folsom, California, USA to develop and support the high volume manufacturing startup of the Katmai product in Penang. He later transferred to Intel Kulim, Malaysia and became the Test Group Leader in 2003. In Dec 2005, Karnail was selected as part of the Fab 7 Test startup team as the Test Group Leader in New Mexico, USA. He then moved to Chandler, Arizona to join the Assembly Operation Department in 2006 as the 1266 Phase 1 Technology Integrator responsible to develop and transfer the Wolfdale product from development to High Volume Manufacturing in Penang and Costa Rica. After completing this assignment, he was selected to lead the Yield and New Product Introduction Department in Intel Products Vietnam in 2008.

Karnail graduated from the University of Toledo, Ohio, USA in Dec’1993 with a Bachelor of Science degree in Electrical Engineering. He later obtained an MBA Degree in 2004 from University Utara Malaysia, Kedah, Malaysia. Karnail is also a certified Level 3 TRIZ practitioner.

Presentation Title "From Rice to Computer Chips" : The Mega Factory startup of Intel’s largest Assembly and Test plant

About 5yrs ago Intel announced its intention to build its largest Assembly Test Plant in Ho Chi Minh City, Vietnam on a former rice field and in July 2010 this intention was realized when this factory was successfully certified to ship its revenue product. The size of this new mega factory is 500K sq ft which is 2X the size of our largest factory in Malaysia. This talk will start with discussing the challenges faced in the start up of this factory. Some of these challenges were in the availability of the experienced high tech workforce, English language proficiency and relevant technical knowledge of the workforce. This talk will also discuss the key strategies that were implemented to address these challenges as well as strategies which led to the factory setting record yields and cycle time.